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2.The process supports design scales of 300 devices or 1000 pads
3.Supports simple circuit simulation
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2.Smooth support for design sizes of over 5,000 devices or 10,000 pads
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STD KBC Probinator
License: Public Domain
Mode: Editors' pick
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Update time：
2023-04-01 23:18:50
Creation time：
2021-12-20 19:18:54
Description
Notes:
- I have not validated the design, nor have I written any software for it. The ports used are listed on the silkscreen.
- The specified 8042 socket requires one of its middle bars to be cut off for U1 (the 74LS06) to fit inside the socket area.
- Adapter PCBs for PLCC (socketed) and QFP (soldered) 8042 chips are included. The silkscreen/chip side is up. Solder the DIP pins facing down.
Design Drawing
schematic diagram
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PCB
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| ID | Name | Designator | Footprint | Quantity |
|---|---|---|---|---|
| 1 | DIP40 | 8042,SK1,SK3 | DIP-40_L50.8-W17.8-P2.54-LS15.2-BL | 3 |
| 2 | 20pF | C1,C2 | CAP-TH_L4.8-W3.2-P5.08-D0.5 | 2 |
| 3 | 1x8 | H1,H2,H3,H5,H6,H7 | HDR-TH_8P-P2.54-V-M | 6 |
| 4 | 2x18 | H4 | HDR-TH_36P-2.54-V-M-R2-C18-S2.54 | 1 |
| 5 | DS1093-01-PN60 | KBD,MS | CONN-TH_DS1093-01-PN60 | 2 |
| 6 | PH-00219 | MODE | HDR-TH_6P-P2.54-V-M-R2-C3-S2.54 | 1 |
| 7 | 4.7K | RN1 | RES-ARRAY-TH_5P-P2.54-D1.0 | 1 |
| 8 | SN74LS06N | U1 | DIP-14_L19.2-W6.6-P2.54-LS10.9-BL | 1 |
| 9 | 8MHZ | X1 | HC-49US_L11.0-W4.6-P4.88 | 1 |
| 10 | PLCC44 | SK2 | PLCC_DS1032-44SDNT1A | 1 |
| 11 | 80C42-QFP44 | U2 | LQFP-44_L10.0-W10.0-P0.80-LS12.0-BL | 1 |
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