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2.The process supports design scales of 300 devices or 1000 pads

3.Supports simple circuit simulation

4.For students, teachers, creators

Profession

1.Brand new interactions and interfaces

2.Smooth support for design sizes of over 5,000 devices or 10,000 pads

3.More rigorous design constraints, more standardized processes

4.For enterprises, more professional users

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STD Logics Gates Modules

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Update time: 2020-08-19 20:09:44
Creation time: 2020-05-23 08:57:35
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ID Name Designator Footprint Quantity BOM_Supplier BOM_Manufacturer BOM_Manufacturer Part BOM_Supplier Part
1 OR U1 SOIC-14_L8.7-W3.9-P1.27-LS6.0-BL 1 LCSC Nexperia HEF4071BT,653 C28869
2 CD4070BM96 U3,U6 SOIC-14_L8.7-W3.9-P1.27-LS6.0-BL 2 LCSC TI CD4070BM96 C28329
3 AND U4,U8 SOIC-14_L8.7-W3.9-P1.27-LS6.0-BL 2 LCSC TI CD4081BM96 C40551
4 CD4001BM U5 SOIC-14_L8.7-W3.9-P1.27-LS6.0-BL 1 LCSC Texas Instruments CD4001BM C283956
5 NAND U2,U7,U9 SOIC-14_L8.7-W3.9-P1.27-LS6.0-BL 3 LCSC HGSEMI CD4011BMTR C194334

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