Editor Version ×
Standard

1.Easy to use and quick to get started

2.The process supports design scales of 300 devices or 1000 pads

3.Supports simple circuit simulation

4.For students, teachers, creators

Profession

1.Brand new interactions and interfaces

2.Smooth support for design sizes of over 5,000 devices or 10,000 pads

3.More rigorous design constraints, more standardized processes

4.For enterprises, more professional users

Ongoing

STD AD8422 test jig

License:

Mode: Editors' pick

  • 565
  • 0
  • 0
Update time: 2020-01-07 11:50:28
Creation time: 2020-01-07 11:43:13
Description
Please do not try to run this simulation. It is only to demonstrate a bug. The AD8422 model is broken both in the way it is accessed by EasyEDA and in the sense that it does not run reliably even in a local installation of LTspiceXVII. This schematic is just to illustrate the library accessing issue in EasyEDA. There is something wrong with the way EasyEDA is accessing the AD8422 model in the ADI1.lib library because it is getting hung up on a subckt for an ADA4700. I think this may be related to the ADA4700 actually being named ADA4700-1 and I think EasyEDA is confused by the "-" (hyphen) instead of a "_" (underscore) character. Even if I copy the AD8422 model paste it into the schematicand change the subckt name to AD8422x and the name in the spice symbol to AD8422x, EasyEDA still goes looking in the ADI1.lib despite netlisting the local version and then hangs of the ADA4700. However, assuming that the library calling issue can be fixed, even when the AD8422 model is run natively in a local installation of LTspiceXVII, it does not run reliably. It works for some reference input voltages but not others (try the AD8422 test jig in a local installation of LTspiceXVII!). So, it requires that AD fix their AD8422 model and EasyEDA fixes the library calling process.
Design Drawing
schematic diagram
1 /
PCB
1 /
The preview image was not generated, please save it again in the editor.
ID Name Designator Footprint Quantity
1 15 V3,V4 HDR1X2 2
2 SINE(1 1 1k) V5 HDR1X2 1
3 1 V6 HDR1X2 1
4 AD8422x U1 SOIC-8 1
5 19.6k R3 AXIAL-0.3 1
6 10k R4 AXIAL-0.3 1

Unfold

Project Attachments
Empty
Project Members
Related Projects
Change a batch
Loading...
Add to album ×

Loading...

reminder ×

Do you need to add this project to the album?

服务时间

周一至周五 9:00~18:00
  • 0755 - 2382 4495
  • 153 6159 2675

服务时间

周一至周五 9:00~18:00
  • 立创EDA微信号

    easyeda

  • QQ交流群

    664186054

  • 立创EDA公众号

    lceda-cn