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2.The process supports design scales of 300 devices or 1000 pads

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2.Smooth support for design sizes of over 5,000 devices or 10,000 pads

3.More rigorous design constraints, more standardized processes

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STD fonar LiFePo

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Update time: 2020-08-06 16:57:33
Creation time: 2020-06-30 10:25:47
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ID Name Designator Footprint Quantity
1 BC847 Q3,Q2,Q7,Q6 SOT23-3 4
2 BZV55-B3V9,115 D6,D5 SOD-80C_L3.3-W1.5-RD 2
3 1N4148 D1,D4 SOD123 2
4 AMS1117_C400139 U1 SOT-223-3_L6.5-W3.4-P2.30-LS7.0-BR 1
5 6.8k R4 R0805 1
6 12.4k R5 R0805 1
7 1k R6,R23,R22,R12,R3 R0805 5
8 100k R28,R20,R1,R13,R25 R0805 5
9 1m R8,R24,R21,R11 R0805 4
10 90.9k R9 R0805 1
11 15.4k R10 R0805 1
12 500 R26,R27 R0805 2
13 0805 R15,R16,R17,R18 R0805 4
14 +BAT XP1 PIN 2.64 1X1 1
15 +OUT XP7 PIN 2.64 1X1 1
16 -BAT XP5 PIN 2.64 1X1 1
17 z/u XP4 PIN 2.64 1X1 1
18 k2 XP3 PIN 2.64 1X1 1
19 k1 XP2 PIN 2.64 1X1 1
20 1uF C3,C2 C0805 2
21 100nF C6,C7,C5,C4 C0805 4
22 BAT54SW D2,D3 SOT323 2
23 AO3401-SOT23 Q8,Q9,Q1 SOT-23_L2.9-W1.3-P0.95-LS2.4-BR 3
24 ATTINY13A-SF U2 SOIC-8_L4.9-W3.9-P1.27-LS6.0-BL 1

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