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STD Project for EDN (Schematic and PCB)

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Update time: 2020-05-03 16:03:05
Creation time: 2014-04-26 21:12:33
Description
Schematic and PCB layout of a simple, three transistor, low power, active clamp circuit.
Design Drawing
schematic diagram
1 /
PCB
1 /
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ID Name Designator Footprint Quantity
1 M02 JP2 JST-2-SMD 1
2 M03 JP1 JST-3-SMD 1
3 QBC857 Q1,Q2 SOT23 2
4 QBC847 Q3 SOT23 1
5 10Meg R1,R5 1206 2
6 2.2Meg R2,R3 1206 2
7 1Meg R4 1206 1
8 3.3p C1 1206 1
9 100n C2 1206 1

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