This is a DMA module for the Z80 CPU used in the RC2014.
**This version has still a bug**. One must connect the +5V signal (available at a pin on the PCB) to the RDY single pin. I tried only memor transfers at 7.8 MHz and they seem to work without problems. So the RDY-signal was floating and this means, that the DMA did NOT release the bus again (the test program was using the continous...
SIO/2 Board for RC2014 backplane
- 74ALS688 addr comparator for address decoding
- Block of 8 addresses assigned
- Arbitrary 8 address boundry
- SIO at Addr 0 does not conflict with IDE at address 10H (Aka Grant Searle design)