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Frendor
Copper Areas Disappearing!
posted by Frendor , 9 hours ago. replied by Frendor , 2 hours ago.
22 3
iamckt
Copper Area Error
posted by iamckt , 2 days ago. replied by iamckt , 5 hours ago.
26 4
viniciusmay
Ratlines NOT UPDATED IN REAL TIME
posted by viniciusmay , 3 days ago. replied by _oeneo_ jw , 6 hours ago.
96 21
istvanb
Drill distance
posted by istvanb , 1 day ago. replied by istvanb , 20 hours ago.
41 4
anoop
Not Able To Print Silkscreen
posted by anoop , 1 day ago. replied by UserSupport , 22 hours ago.
29 2
Ahiad
How to avoid duplication in PCB layout
posted by Ahiad , 4 days ago. replied by rom1nux , 1 day ago.
66 6
dalacort
Too many users in simulation. Please try again later
posted by dalacort , 2 days ago. replied by andyfierman , 1 day ago.
38 3
davri
False DRC errors
posted by davri , 6 days ago. replied by davri , 1 day ago.
93 6
Dmitry Ponyatov
Local autorouter API
posted by Dmitry Ponyatov , 1 week ago. replied by dillon , 2 days ago.
68 5
andyfierman
Inconsistent handling of illegal characters.
posted by andyfierman , 5 days ago. replied by andyfierman , 2 days ago.
37 2
JonathanCaes
Package is not assigned. Please assign a package.
posted by JonathanCaes , 10 months ago. replied by LCSC , 2 days ago.
1977 10
skyn3t
EElib won't have the part I need? how to add it
posted by skyn3t , 4 days ago. replied by andyfierman , 2 days ago.
45 5
Ahiad
Annotation when placing 2 of the same module
posted by Ahiad , 4 days ago. replied by UserSupport , 2 days ago.
37 3
spatz
Rotation Angle Rounding Isse
posted by spatz , 3 days ago. replied by UserSupport , 3 days ago.
24 2
anoop
Autorouter
posted by anoop , 4 days ago. replied by UserSupport , 3 days ago.
37 1
eric.baril.31
PCB Edge fingers for M.2
posted by eric.baril.31 , 3 days ago. replied by andyfierman , 3 days ago.
24 1
GerryChen
How to Check DRC Errors Using Easyeda?
posted by GerryChen , 2 years ago. replied by PaulRB , 3 days ago.
1777 1
terryjmyers
Ordering 1.0mm PCBs does not transfer gerbers to JLPCB
posted by terryjmyers , 5 days ago. replied by UserSupport , 4 days ago.
31 1
forzaelectronica
How to arrange rateline without overlapping?
posted by forzaelectronica , 1 month ago. replied by forzaelectronica , 4 days ago.
193 3
andyfierman
JLCPCB Gerber Viewer not accepting EasyEDA Gerber zips
posted by andyfierman , 6 days ago. replied by andyfierman , 5 days ago.
68 2
whiskyfan
Gerber file incorrect.
posted by whiskyfan , 6 days ago. replied by andyfierman , 5 days ago.
112 8
ban.relayer
Project group
posted by ban.relayer , 1 week ago. replied by ban.relayer , 6 days ago.
50 2
butmalai.dan
Copper Area missing settings
posted by butmalai.dan , 1 week ago. replied by UserSupport , 1 week ago.
41 1
aseredy
How to create FAB and ASSY Drawings for PCB mass production?
posted by aseredy , 1 week ago. replied by aseredy , 1 week ago.
69 4
foskolo
Wrong or missing border outline
posted by foskolo , 1 week ago. replied by UserSupport , 1 week ago.
75 1
gamerpaddy
Copy/Pasting without changing prefixes?
posted by gamerpaddy , 1 week ago. replied by UserSupport , 1 week ago.
38 1
NuttyProfessor47
Update PCB fails to report footprint changes
posted by NuttyProfessor47 , 2 weeks ago. replied by NuttyProfessor47 , 1 week ago.
199 7
mr.santiaga
Deleted schematic
posted by mr.santiaga , 1 week ago. replied by andyfierman , 1 week ago.
44 2
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