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2.The process supports design scales of 300 devices or 1000 pads

3.Supports simple circuit simulation

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2.Smooth support for design sizes of over 5,000 devices or 10,000 pads

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Update time: 2022-11-08 11:14:16
Creation time: 2019-10-17 16:35:45
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ID Name Designator Footprint Quantity
1 204-10SURD/S530-A3 LED1,LED2,LED3,LED4,LED5,LED6,LED7,LED8,LED9,LED10,LED11,LED12,LED13,LED14,LED15,LED16 LED-3MM/2.54 16
2 100 R1,R2 R_AXIAL-0.3 2
3 100 R3,R4,R5,R6,R7,R8 AXIAL-0.3 6
4 CD4017BM/TR U1,U2 SOP-16_L10.0-W3.9-P1.27-LS6.0-BL 2
5 470u C1 CPOL-RADIAL-10UF-25V-KIT 1
6 10n C2,C3 C1206 2
7 10u C4 CPOL-RADIAL-10UF-25V 1
8 Header-Male-2.54_1x2 H1 HDR-TH_2P-P2.54-V-M-1 1
9 82k R9 R1206_1 1
10 82k R10 R1206 1
11 22k R11,R12 R1206 2
12 10k R13 R1206 1
13 1825910-6 SW1 SW-TH_4P-L6.0-W6.0-P4.50-LS6.5 1
14 NE555P U3 SO-8_L4.9-W3.9-P1.27-LS5.9-BL 1
15 NE555P U4 PG-DSO-8_L5.0-W4.0-P1.27-LS6.0-BL 1
16 JST 2.54 - 2S U14 JST-PCB-0.1IN-2P 1
17 IRF7343T Q1 SOIC-8_L4.9-W3.9-P1.27-LS6.0-BL 1

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