CIRCUITO GENERAL PLL - EasyEDA open source hardware lab

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STD CIRCUITO GENERAL PLL

Mode: Editors' pick

Update time： 2022-04-17 02:40:10

Creation time： 2019-11-11 22:47:50

Description

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Design Drawing

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BOM

ID	Name	Designator	Footprint	Quantity
1	C-VARIABLE	22P	C-VARIABLE	1
2	1u	C1,C2,C34,C36,C4,C10,C40	CAP-D3.0XF1.5	7
3	1u	C3,C28,C31,C35	RAD-0.1	4
4	2.2n	C5,C11	RAD-0.1	2
5	150p	C6,C12	RAD-0.1	2
6	27p	C7,C8	RAD-0.1	2
7	1n	C9,C19,C21,C39	RAD-0.1	4
8	10u	C13,C14,C15	CAP-D3.0XF1.5	3
9	33n	C16,C18	RAD-0.1	2
10	150n	C17	RAD-0.1	1
11	10p	C20	RAD-0.1	1
12	220u	C22,C25,C37	CAP-D3.0XF1.5	3
13	100n	C23,C24	RAD-0.1	2
14	100p	C26	RAD-0.1	1
15	330p	C27,C30,C32	RAD-0.1	3
16	47p	C29	RAD-0.1	1
17	15p	C33	RAD-0.1	1
18	140p	C38	RAD-0.1	1
19	VARICAP	D1	NONE	1
20	1N4448	D2,D3	DO-35	2
21	22u	L3,L4	AXIAL-0.4	2
22	1m	L5,L6	AXIAL-0.4	2
23	7.6MHz	Q2	Q	1
24	BC238	Q3	TO92-EBC	1
25	3.2MHz	Q4	Q	1
26	2N3904	Q5,Q7	TO-92(TO-92-3)	2
27	S8550	Q6	SEEED-SOT-23	1
28	BF998	Q9	SOT-143_L2.9-W1.3-P1.92-LS2.3-BL	1
29	1k	R1,R3,R4,R6,R14,R17,R18,R19,R21	AXIAL-0.3	9
30	10k	R2,R5	RES-ADJ_3386P	2
31	10K	R7	AXIAL-0.3	1
32	22K	R8,R9,R30	AXIAL-0.3	3
33	47K	R10,R11	AXIAL-0.3	2
34	100k	R12	AXIAL-0.3	1
35	470	R13	AXIAL-0.3	1
36	10k	R15	AXIAL-0.3	1
37	1k5	R16	AXIAL-0.3	1
38	100	R20	RES-ADJ_3386P	1
39	50K	R22	RES-ADJ_3386P	1
40	1K	R23	AXIAL-0.3	1
41	560	R24	AXIAL-0.3	1
42	1K5	R25	AXIAL-0.3	1
43	100K	R26	AXIAL-0.3	1
44	220	R27	AXIAL-0.3	1
45	5K6	R28,R29	AXIAL-0.3	2
46	BH1417EE	U1	SOP22	1
47	7805	U2	TO252	1
48	TSA5511AT	U3	NONE	1
49	LM7805EE	U4	TO-220(TO-220-3)	1
50	358	U5	NONE	1
51	LM358	U6	NONE	1

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Project Members

Jaime Villegas