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2.The process supports design scales of 300 devices or 1000 pads

3.Supports simple circuit simulation

4.For students, teachers, creators

Profession

1.Brand new interactions and interfaces

2.Smooth support for design sizes of over 5,000 devices or 10,000 pads

3.More rigorous design constraints, more standardized processes

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License: Public Domain

Mode: Editors' pick

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Update time: 2020-06-16 08:36:20
Creation time: 2019-11-05 08:48:11
Description
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Design Drawing
schematic diagram
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PCB
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ID Name Designator Footprint Quantity
1 30PIN C1 APPLE 30PIN 1
2 TLP283 OK1 MINI-FLAT-4 1
3 MP2307 U2 SOP-8_EP_150MIL 1
4 1 R2,R5,R1,R7,R4,R3,R6 0603 7
5 1u C8,C3,C9,C7 CAP-D5.0XH5.5 4
6 2x2 H1 4.2-2*2 1
7 AOD403 Q2,Q1 TO-252-2(2) 2
8 2X3P P1 6_PIN_HEADER_2.0MM 1
9 WS2812B LED3,LED6,LED4,LED2,LED1,LED5 LED-5050_4P 6
10 2X3P CN1 SIP-4.2MM-6P-CKMTW-H10.0 1
11 ATMEGA328P-MU U3 QFN-32_5X5X05P 1
12 7805DT U4 TO252 1
13 100 L1 5D28(5.7*5.7*2.8MM) 1
14 PCI-E U1 PCI-E X16 SLOT 1
15 1nF C6,C2,C5,C4 0603 4

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