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2.The process supports design scales of 300 devices or 1000 pads
3.Supports simple circuit simulation
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2.Smooth support for design sizes of over 5,000 devices or 10,000 pads
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STD MGA Speed Trap_1
License: Public Domain
Mode: Editors' pick
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Update time：
2018-09-06 17:12:14
Creation time：
2018-09-06 17:12:06
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| ID | Name | Designator | Quantity | Mounted |
|---|---|---|---|---|
| 1 | FIDUCIAL | FID1,FID2,FID3 | 3 | Yes |
| 2 | 100nF | C7 | 1 | Yes |
| 3 | 2.2K | R11,R10 | 2 | Yes |
| 4 | 640454-2 | J10,J7,J9,J6_A,J6_B | 5 | Yes |
| 5 | BAT54S | D15,D5_A,D9_A,D4_A,D8_A,D5_B,D9_B,D4_B,D8_B | 9 | Yes |
| 6 | 1375820-2 | RESET.C1,DC12V.C1,PWRLED.C1,LATCH.C1_A,LATCH.C1_B | 5 | Yes |
| 7 | 1375819-1 | RESET.P2,RESET.P1,DC12V.P1,DC12V.P2,PWRLED.P2,PWRLED.P1,LATCH.P2_A,PULSE.P4_A,PULSE.P3_A,PULSE.P2_A,PULSE.P1_A,LATCH.P1_A,EMIT1.P4_A,EMIT1.P3_A,EMIT1.P2_A,EMIT1.P1_A,EMIT2.P4_A,EMIT2.P3_A,EMIT2.P2_A,EMIT2.P1_A,RCV1.P4_A,RCV1.P3_A,RCV1.P2_A,RCV1.P1_A,RCV2.P4_A,RCV2.P3_A,RCV2.P2_A,RCV2.P1_A,LATCH.P2_B,PULSE.P4_B,PULSE.P3_B,PULSE.P2_B,PULSE.P1_B,LATCH.P1_B,EMIT1.P4_B,EMIT1.P3_B,EMIT1.P2_B,EMIT1.P1_B,EMIT2.P4_B,EMIT2.P3_B,EMIT2.P2_B,EMIT2.P1_B,RCV1.P4_B,RCV1.P3_B,RCV1.P2_B,RCV1.P1_B,RCV2.P4_B,RCV2.P3_B,RCV2.P2_B,RCV2.P1_B | 50 | Yes |
| 8 | RAC10-12SK/277 | U6 | 1 | Yes |
| 9 | 1N5819HW-7-F | D11 | 1 | Yes |
| 10 | 796636-3 | J8 | 1 | Yes |
| 11 | 100nF | C4,C2_A,C1_A,C3_A,C2_B,C1_B,C3_B | 7 | Yes |
| 12 | LTST-C190KGKT | D12,D13,D1_A,D1_B | 4 | Yes |
| 13 | 4.7K | R7 | 1 | Yes |
| 14 | 1.5K | R8,R12_A,R12_B | 3 | Yes |
| 15 | TP_THRU_1.02MM | TP3,TP4,TP5,TP6,TP2_A,TP1_A,TP2_B,TP1_B | 8 | Yes |
| 16 | 300R | R6,R4_A,R2_A,R4_B,R2_B | 5 | Yes |
| 17 | PDS1-S12-S5-M-TR | U7 | 1 | Yes |
| 18 | 284041-3 | AC.C1 | 1 | Yes |
| 19 | 8.2k | R3_A,R1_A,R5_A,R9_A,R3_B,R1_B,R5_B,R9_B | 8 | Yes |
| 20 | 640456-4 | J1_A,J2_A,J3_A,J5_A,J4_A,J1_B,J2_B,J3_B,J5_B,J4_B | 10 | Yes |
| 21 | TLP2366(TPL,E | U1_A,U4_A,U1_B,U4_B | 4 | Yes |
| 22 | 0R | R13_A,R15_A,R16_A,R14_A,R13_B,R15_B,R16_B,R14_B | 8 | Yes |
| 23 | 1375820-4 | EMIT2.C1_A,EMIT1.C1_A,RCV1.C1_A,RCV2.C1_A,PULSE.C1_A,EMIT2.C1_B,EMIT1.C1_B,RCV1.C1_B,RCV2.C1_B,PULSE.C1_B | 10 | Yes |
| 24 | SN74LVC1G32DCKR | U5_A,U5_B | 2 | Yes |
| 25 | SN74HC74D | U2_A,U2_B | 2 | Yes |
| 26 | SN74LVC1G86DBVT | U3_A,U3_B | 2 | Yes |
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