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2.The process supports design scales of 300 devices or 1000 pads

3.Supports simple circuit simulation

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1.Brand new interactions and interfaces

2.Smooth support for design sizes of over 5,000 devices or 10,000 pads

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STD PROJET JOYSTICK

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Update time: 2020-10-09 08:27:14
Creation time: 2019-10-31 16:53:20
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ID Name Designator Footprint Quantity
1 ICseat-40P PIC18F45K50 DIP-40_W15.24MM_SOCKET 1
2 USB-B-Female-TH_C46393 USB-B USB-B_4PIN-FEMALE_BF90 1
3 JOYSTICKPTH JOYSTICK JOYSTICK 1
4 TS-1102-5016 BP_A,BP_HOME,BP_B,BP_JOY BOUTON 4
5 DS1037-09MNAKT74-0CC DE-9 DSUB9-1 1
6 10K RN1 RES-ARRAY-TH_5P-P2.54-D1.0 1
7 10K POT_GACHETTE,POT_PJOY1,POT_PJOY2 POTENTIOMETRE 3
8 100nF C6,C7,C1,C2,C3,C4,C5 CAP-TH_L6.0-W6.0-P5.08-D1.0 7
9 Z-211-0611-0021-001 CONNECTEUR1,CONNECTEUR2 HDR-TH_6P-P2.54-V_Z-211-0611-0021-001 2
10 10KΩ R1 AXIAL-0.3 1
11 SP3232EUCP SP3232EUCP DIP-16 1

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