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2.The process supports design scales of 300 devices or 1000 pads

3.Supports simple circuit simulation

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2.Smooth support for design sizes of over 5,000 devices or 10,000 pads

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STD p3-v2-head

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Mode: Editors' pick

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Update time: 2018-09-25 00:52:47
Creation time: 2018-09-09 07:32:53
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ID Name Designator Footprint Quantity Mounted
1 100uf CR,CE,CX CAP-AL-B 3 Yes
2 conn4 JRMOT,JEMOT,JXMOT,JHPWR,JHDATA HDR1X4 5 Yes
3 DRV8825 MR,ME,MX DRV8825-MODULE 3 Yes
4 conn2 JLIMR,JLIMX,JLIMZ,JLED4,JLED3,JLED2,JLED1 HDR1X2 7 Yes
5 ULN2003ADR TA1,TA2,TA3,TA4 SOIC-16_150MIL 4 Yes C7512
6 conn5 JMOTA,JMOTB,JMOTC,JMOTF,JMOTP,JMOTZ1,JMOTZ2 HDR1X5 7 Yes
7 res47x4 RALED R_ARRAY_SIP8 1 Yes
8 47uf CAB,CCZ,CFP CAP-AL-B 3 Yes
9 CON1X5 HICPM,HICPS HDR1X5 2 Yes
10 0.1uf CM1,CM2 TH-2-5MM 2 Yes
11 .1uf CS TH-2-5MM 1 Yes
12 CON1 TPGND1,TPGND2 HDR1 2 Yes
13 CON1X4 TP HDR1X4 1 Yes
14 10k RN1,RN2 R_ARRAY_SIP6 2 Yes
15 PIC24F16KM202 MCUS SOIC-28_300MIL 1 Yes C138704
16 PIC24F16KM204 MCUM QFP44 1 Yes PIC16F13575-I/PT

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