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STD I2S 2CH Class D Amp with gain select

License: Public Domain

Mode: Editors' pick

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Update time: 2021-09-13 10:20:57
Creation time: 2020-08-18 05:32:22
Description
This is a simple circuit that can be used to test I2S input to a small Class D amplifier. The amplifier used is the Maxim Integrated MAX98357A (LRCLK Polarity = Low). Outputs are filterless, however a Ferrite Bead Filter is included on the output to support longer speaker cable runs. I've included a simple multipin header to allow experimenting with selecting different gain settings of the amplifier. I've used a 3.3V voltage regulator to support SD_MODE selection using resistor values used on the MAX98357 Evaluation Board. Pulling the SD_MODE pin of the MAX98357 to low shuts down the amplifiers.
Design Drawing
schematic diagram
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ID Name Designator Footprint Quantity
1 Header-Male-2.54_1x3 P3 HDR-3X1/2.54 1
2 0.1u C3,C1 C0603 2
3 10u C2,C4 C0603 2
4 WJ15EDGVC-3.81-2P P4 WJ15EDGVC-3.81-2P 1
5 Gain Select Header J2 HDR-TH_6P-P2.54-V-R2-C3-S2.54 1
6 100K R5,R6 R0603 2
7 WJ2EDGV-5.08-2P P1,P2 WJ2EDGV-5.08-2P 2
8 MAX98357A IC1,IC2 TQFN-16 2
9 HDR-M-2.54_1x3 J1 HDR-M-2.54_1X3 1
10 TLV76733-WSON-6 U1 WSON-6-2X2 1
11 499k R2 R0603 1
12 160k R3 R0603 1
13 2.2u C6,C5 C0805 2
14 2k R4 R0603 1
15 226k R1 R0603 1
16 330Ω L2,L1,L3,L4 L0603 4
17 680pF C9,C7,C8,C10 C0402 4

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