GPL 3.0
Input below 0,6v to prevent clipping, maximum output 1v sinus. PreAmp is required to be connected to output.
| ID | Name | Designator | Footprint | Quantity |
|---|---|---|---|---|
| 1 | 1N5819 | D1,D2,D3,D4,D5,D6,D7,D8,D9,D10 | DO-41_BD2.4-L4.7-P8.70-D0.9-FD | 10 |
| 2 | 10u | C5 | CAP-D6.3XF2.5 | 1 |
| 3 | TDA7052A | U1,U2,U3,U4 | DIP8 | 4 |
| 4 | 1k | R1,R2,R3,R4 | AXIAL-0.4 | 4 |
| 5 | 20k | R5,R6,R7,R8,R10,R11,R12 | AXIAL-0.4 | 7 |
| 6 | 1M | R9 | AXIAL-0.4 | 1 |
| 7 | Header-Male-2.54_1x1 | P1,P2,P3,P4 | HDR-1X1/2.54 | 4 |
| 8 | 10u | C1,C2,C3,C4 | CAP-D5.0XF2.0 | 4 |
| 9 | Header-Male-2.54_1x2 | OUT,VCC,IN | HDR-2X1/5.08 | 3 |
| 10 | 1u | C6,C7,C8,C9,C13,C17 | CERAMIC-5.08 | 6 |
| 11 | 220n | C10,C14 | CERAMIC-5.08 | 2 |
| 12 | 22n | C11,C15 | CERAMIC-5.08 | 2 |
| 13 | 2n2 | C12,C16 | CERAMIC-5.08 | 2 |
| 14 | TDA7052ATN2 | U5 | SOIC-8 | 1 |
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