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2.The process supports design scales of 300 devices or 1000 pads

3.Supports simple circuit simulation

4.For students, teachers, creators

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1.Brand new interactions and interfaces

2.Smooth support for design sizes of over 5,000 devices or 10,000 pads

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STD ESCE

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Update time: 2022-09-12 00:00:50
Creation time: 2018-03-11 18:45:03
Description
Code here: https://github.com/Aequi/esce
Design Drawing
schematic diagram
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ID Name Designator Footprint Quantity
1 MCP1700T-3302E/TT U1 SOT-23(SOT-23-3) 1
2 10k R18,R20,R19,R2,R1,R3,R10,R22 0805 8
3 1u C3,C4 0805 2
4 100 R14,R13,R11,R9,R8,R7 0805 6
5 1K2 R15,R16,R17 0805 3
6 510 R4,R5,R6 0805 3
7 47u C2,C1 0805 2
8 FB L1 0805 1
9 100n C11,C9,C8,C17 0805 4
10 4u7 C10 0805 1
11 1k R12,R21 0805 2
12 1n C12,C5,C6,C7,C18 0805 5
13 IRF7319 Q2,Q3,Q1 SO-8 3
14 Header-Male-2.54_1x2 P1 1X02-R-PTH_M 1
15 NO USB1 MICRO-USB5+2P-SMD-0.65_BIG_PADS 1
16 Pad J1,J2,J3,J4,J5,J6,J7,J8,J9,J10,J11,J12,J13,J14,J15,J16 1P-6535MIL_ROUND 16
17 22p C13,C14 0805 2
18 CRYSTAL-2P3225 X1 X4-SMD-3.2X2.5X0.7MM 1
19 2K2 R24,R25 0805 2
20 0805 LD1 LED-0805 1
21 STM32F030K6T6 U2 TQFP-32_7X7X08P 1

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