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2.The process supports design scales of 300 devices or 1000 pads

3.Supports simple circuit simulation

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Profession

1.Brand new interactions and interfaces

2.Smooth support for design sizes of over 5,000 devices or 10,000 pads

3.More rigorous design constraints, more standardized processes

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STD FYP1

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Update time: 2021-01-02 05:09:44
Creation time: 2021-01-01 08:34:26
Description

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Design Drawing
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ID Name Designator Footprint Quantity
1 JTAG H2,H4 HDR-F-2.54_1X6 2
2 ESP WROOM 32 U1 ESP32 1
3 CON P1 CONN-TH_2P-P5.00 1
4 AD5933YRSZ U8 SSOP-16_L6.2-W5.3-P0.65-LS7.8-BL 1
5 ABPDANT015PGAA5 U10 ABPDANT015PGAA5 1
6 10K R1,R2 0805 2
7 REF R3 0805 1
8 50k R4,R5,R6,R7 0805 4
9 20k R8,R9 0805 2
10 1k R11,R12,R13,R14 0805 4
11 4*4*1.5 KEY1,KEY2 KEY-SMD_4P-L5.2-W5.2-P3.70-LS6.4 2
12 AMS1117 U4,U2,U5 PG-SOT223-4_L6.5-W3.5-P2.30-LS7.0-BR 3
13 SWITCH R10 R_AXIAL-0.3 1
14 XHB-2A Connector CN1 CONN-TH_XHB-2A 1
15 HDR-M-2.54_1x2 J1,J2 HDR-M-2.54_1X2 2
16 128X64 OLED I2C NEW U6 I2C - OLED 0.96" 128X64 1
17 22pF C1,C2,C7,C8 0805 4
18 100nF C3,C4,C5,C6 0805 4
19 22uF C9,C12,C14 0805 3
20 10uF C10,C11,C13 0805 3
21 47nF C15 0805 1
22 ATMEGA328P-PU U3,U7 ATMEGA 328P-PU 2
23 REF H1 HDR-F-2.54_1X4 1
24 Temp H3,H5 HDR-F-2.54_1X4 2
25 PPG H6 HDR-F-2.54_1X4 1
26 16MHZ X1,X2 OSC-49S-1 2
27 AD8606 U9 MSOP-8_L3.0-W3.0-P0.65-LS5.0-BL 1

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