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LM13700 test jigs

2 years ago 1251
  • Description
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Description

Some simple test jigs from the TI datasheet for the LM13700.

The EasyEDA spice symbols LM13700_TI.1 and LM13700_TI.2 both use the original National Semiconductor subckt (now hosted by TI) but the pin connections of each symnbol are mapped onto each of the two devices in the 16 pin DIP (or SOIC) package.

Product page:

http://www.ti.com/product/LM13700

Datasheet:

http://www.ti.com/lit/ds/symlink/lm13700.pdf

Spice model:

http://www.ti.com/lit/zip/snom267

For background information on the OTA that forms the core of the LM13700, see:

http://www.intersil.com/content/dam/Intersil/documents/ca30/ca3080-a.pdf

http://www.intersil.com/content/dam/Intersil/documents/an66/an6668.pdf

Documents

LM13700 VCA test jig

LM13700 VCF test jig

BOM

ID Name Designator Footprint Quantity
1 SIN(0 1 1k) AC 1 0 VIN 2P-5.0 1
2 15 VPOS,VNEG 2P-5.0 2
3 SIN(1 14 50) V_AMP_BIAS 2P-5.0 1
4 30k R1,R_ABIAS,R_DBIAS,RIN NONE 4
5 1k RTRIM,R1,R3,R8,R9 NONE 5
6 5k R2 NONE 1
7 LM13700_NS U1 PDIP16 1
8 PULSE(-1V 1V 0s 1us 1us 499us 1ms) AC 1 0 VIN 2P-5.0 1
9 15V VPOS,VNEG 2P-5.0 2
10 10k RIN NONE 1
11 5.1k R2,R4 NONE 2
12 PULSE(1.5V 2.5V 0s 15ms 1us 1ps 15ms) V_AMP_BIAS 2P-5.0 1
13 15k R_ABIAS NONE 1
14 800p C1,C2 RAD-0.1 2
15 20k R5,R6,R7 NONE 3
16 V=V(SWEEP,VEE) B1 NONE 1

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