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STD Thyristor dv/dt demo
License: Public Domain
Mode: Editors' pick
- 0
Update time：
2021-04-11 12:19:13
Creation time：
2015-10-07 22:14:02
Description
Demonstrating the effect of dv/dt turn-on in a Thyristor.
For a Thyristor or SCR in the non-conducting state -
even with the gate tied to the cathode - as the rate
of change of voltage (dv/dt) across the anode and
cathode terminals exceeds the datasheet specified
maximum value (in this case 30V/us), the device will
turn on.
A similar effect occurs in Diacs and Triacs.
This simulation uses the EasyEDA Thyristor model. For more on this model see:
https://easyeda.com/editor#id=57484b1c27dd43aaa8aada2cb5f5fc81
and:
https://easyeda.com/editor#id=63f9efaae37446178f7e1b00033dcb7b
in:
https://easyeda.com/example/project-BDxrlDVdv
To run the simulation:
CTRL+R
signality.co.uk
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| ID | Name | Designator | Quantity |
|---|---|---|---|
| 1 | Pulse(1 2.1 2.5u) | V2 | 1 |
| 2 | V=LIMIT(0, 15, V(gen)) | B1 | 1 |
| 3 | 100 | R1 | 1 |
| 4 | V=V(ramp)*V(slope) | B2 | 1 |
| 5 | 2N5060EE | T1 | 1 |
| 6 | Pulse(0 15 0 1u 10n 1u 3u) | V1 | 1 |
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