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Two ways to implement a behavioural Voltage Controlled Oscillator in simulations.

This project demonstrates a behavioural voltage controlled oscillator based on an integrator and a similar scheme where the integrator is replaced by the `TIME`

function of ngspice (see: http://ngspice.sourceforge.net/docs/ngspice-manual.pdf#subsection.5.1.2 for details).

B_isource_n_vlimiter forms a Voltage Controlled Current Source in parallel with a precision zener-like shunt clamp to provide the voltage limiting function.

The output current from this source is integrated by capacitor CINTEGRATOR to generate a voltage, V(integral). The initial voltage across this capacitor is set by a `.ic`

spice directive.

V(integral) is then used to represent the phase of a sine function. The initial value to the ramp defines the initial phase of the sinusoid.

The voltage into the integrator therefore represents frequency.

Adding a voltage, V(phi) to represent the phase of the sine source also allows for phase modulation of the source.

Applying a Unit Step, U(x), function to the sine function generates a square wave.

By applying an inverse sine function to the sine function a triangle waveform is developed.

A modulo divide function is used to divide the ramp into contiguous sawtooth segments.

`TIME`

variable based VCOThe output voltage of each source is derived from the ngspice built-in variable, 'TIME' multiplied by the input voltage.

Since TIME increases linearly, the slope of the ramp function so formed is proportional to the Frequency input control voltage.

The ramp is then used to represent the phase of a sine function. Adding an initial value to the ramp defines the initial phase of the sinusoid.

Adding a voltage, V(phi) to represent the phase of the sine source also allows for phase modulation of the source.

Applying a Unit Step, U(x) function to the sine function generates a square wave.

By applying an inverse sine function to the sine function a triangle waveform is developed.

The same modulo divide function as used in the integrator based VCO is used to divide the time ramp into contiguous sawtooth segments.

Putting V(sawout) or V(triout) of either version of the VCO into a comparator function such a U(x) would then give an adjustable duty cycle pulse output.

Note that the frequency control input voltage of either version of the VCO can be negative which reverses polarity of the time ramp and so represents negative frequency: this is best observed on the sawtooth output.

Open in Editor then CTRL+R to run the sim.

ID | Name | Designator | Quantity |
---|---|---|---|

1 | 1 | CINTEGRATOR | 1 |

2 | 1T | RDCPATH | 1 |

3 | PULSE(0 1k 1u) | V2 | 1 |

4 | V=2*ABS( (V(integral)+V(phi)/180)/modulo-INT((V(integral)+V(phi)/180)/modulo) )-1 | BSAW | 1 |

5 | I=gain*(V(inp,inn) + ( uramp(V(integral)-hilim) - uramp(-V(integral)+lolim) )/Rser) | B_ISOURCE_N_VLIMITER | 1 |

6 | 1 | R1,R2 | 2 |

7 | V=SIN((V(integral)+V(phi)/180)*pi) | BSIN | 1 |

8 | V=invsin(SIN((V(integral)+V(phi)/180)*pi))*2/pi | BTRI | 1 |

9 | 90 | V1 | 1 |

10 | V=2*(U(SIN((V(integral)+V(phi)/180)*pi))-0.5) | BSQR | 1 |

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如果需要转移工程请在个人中心 - 工程 - 工程高级设置 - 下载工程，下载后在https://lceda.cn/editor 打开保存即可。

有问题联系QQ 3001956291 不再提醒

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