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ViaPlaceProject

1 year ago 181
  • Description
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Description

Example project to demonstrate issues placing stiching vias using the automatic placement button

Documents

Example Schematic

PCB_2020-09-14_15-10-49

BOM

ID Name Designator Footprint Quantity
1 MCHP-TC2030 HDR3 TC2030-MCP 1
2 IC-012 U3 SOT-23-6 1
3 100u C4 CASE-A_3216 1
4 50MHz Y2 CRY-006 1
5 22u L1 0805 1
6 HDR-060 HDR1 HDR-060 1
7 BH-002 B1 BH-002 1
8 0.01u C22 0603 1
9 CRY-002 Y1 CRY-002 1
10 .22u C10 0603 1
11 SPKR-003 SPKR1 SPKR-003 1
12 D-004 D1,D2 LL-34 2
13 SW-009 SW2 SW-009 1
14 1k R9,R12 0603 2
15 1.1 R1 0805 1
16 SO-001 SO1 SO-001 1
17 0.1u C3,C8,C1 0603 3
18 IC-042 U5 IC-042 1
19 100k R14,R13 0603 2
20 33 R18,R17 0603 2
21 10k R46,R45,R49,R48,R47,R15 0603 6
22 2.2k R43,R42 0603 2
23 HDR-028 HDR8 HDR-028 1
24 1u C9 0603 1
25 TEST_POINT TP1,TP2,TP3,TP4,TP8,TP9,TP7 TESTPOINT_2MM5 7

Attachments

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Members

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你现在访问的是EasyEDA海外版,使用建立访问速度更快的国内版 https://lceda.cn(需要重新注册)
如果需要转移工程请在个人中心 - 工程 - 工程高级设置 - 下载工程,下载后在https://lceda.cn/editor 打开保存即可。
有问题联系QQ 3001956291 不再提醒
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