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2.The process supports design scales of 300 devices or 1000 pads

3.Supports simple circuit simulation

4.For students, teachers, creators

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1.Brand new interactions and interfaces

2.Smooth support for design sizes of over 5,000 devices or 10,000 pads

3.More rigorous design constraints, more standardized processes

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Update time: 2018-09-18 01:54:02
Creation time: 2018-09-13 01:46:08
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ID Name Designator Footprint Quantity Mounted
1 TI CC2560 U1 NONE 1 Yes CC2650F128RHBT
2 15pF C1,C2 RAD-0.1 2 Yes
3 1pF C3,C4,ANT RAD-0.1 3 Yes
4 2.4nH L1,L2 AXIAL-0.4 2 Yes
5 DNM ANT2 RAD-0.1 1 Yes
6 2nH ANT1,ANT4 AXIAL-0.4 2 Yes
7 32.768KHz X2 OSC-49S-1 1 Yes C16369
8 DNM0402 C5,C6 RAD-0.1 2 Yes
9 12pF C7,C8 RAD-0.1 2 Yes
10 1k R1,R2,R3,R4 AXIAL-0.3 4 Yes
11 1u C9,C10,C17,C18,C19,C20,C22,C23 RAD-0.1 8 Yes
12 DMN C11 RAD-0.1 1 Yes
13 100nF C12,C13,C14,C15 RAD-0.1 4 Yes
14 22uF C16 RAD-0.1 1 Yes
15 BLM18HE152SN1 L3 AXIAL-0.4 1 Yes BLM18HE152SN1
16 1m L4 AXIAL-0.4 1 Yes
17 25 MHz X1 NONE 1 Yes
18 TPS22910AYZV U2 NONE 1 Yes 296-29860-2-ND

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