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Spice tutorials

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A series of tutorials to introduce and help users learn the basics of spice simulation in EasyEDA.

The content of this project is constantly evolving and is updated frequently so watch this space! The EasyEDA spice simulation learning resource.

A continuation of these tutorials can be found here:


Effects of finite switch resistances

Kirchhoff's voltage law

Kirchhoff's voltage law netlist

Spice Sinusoidal Source

Simple Fourier Synthesis

Potentiometers and Variable Resistors

Plot and compare diode forward currents vs. voltage

About datasheet, device and simulation model parameters

All simulation schematics MUST have a ground 01

All simulation schematics MUST have a ground 02

Nets can be joined by netnames 01

Probing voltages 02

All simulation schematics MUST have a power supply too!

Nets can be joined by netnames 02

Probing voltages 01

Probing currents 01

Using the 'probe' command

Nets can be joined by netnames 03

Probing instantaneous power (V*I)

Probing resistance (V/I) and conductance (I/V)

Sweep a resistor value

Sweep the ambient temperature

Using Ctrl+R to run a simulation directly

Using the 'let' command

About spice analyses in EasyEDA

Spice PULSE Source more examples

Spice SFFM Source

Spice Sinusoidal Source more examples

Spice PULSE Source

Spice EXP Source

Spice AM Source

Spice PWL Source

Setting initial circuit conditions 01

Setting initial circuit conditions 02

Setting initial circuit conditions 03

Setting initial circuit conditions 04

EasyEDA switches are not ideal







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