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Completed
STD Arduino 8 Channel Relay Module Logic Invert
License: Public Domain
Mode: Schematic/Simulation
- 0
Update time：
2024-04-30 09:22:54
Creation time：
2024-04-13 09:49:50
Description
This is a daughter card to plug into the 8 channel relay module.
We needed to change the logic of the relays to be active high as it is out of the box it's active low, which is stupid because the very first thing the Arduino does is resets, this causes the outputs by going low which triggers all the relays on. I've built two prototypes on perforated board and they work as designed.
Design Drawing
schematic diagram
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| ID | Name | Designator | Quantity | description | |
|---|---|---|---|---|---|
| 1 | 1N4148W | D1,D2,D3,D4 | 4 | 1N4148W | |
| 2 | P2 | J1 | 1 | TEST_1P | |
| 3 | P3 | J2 | 1 | TEST_1P | |
| 4 | TEST_1P | J3 | 1 | TEST_1P | |
| 5 | EXT GND | P1 | 1 | TEST_1P | |
| 6 | EXT +15 | P2 | 1 | TEST_1P | |
| 7 | P1 | P3 | 1 | TEST_1P | |
| 8 | Header-Female-2.54_1x6 | P4 | 1 | Header-Female-2.54_1x6 | |
| 9 | P4 | P5 | 1 | TEST_1P | |
| 10 | 2N7002F-VB | Q1,Q2,Q3,Q4,Q5,Q6,Q7,Q8,Q9,Q10,Q11,Q12 | 12 | 2N7002F-VB | |
| 11 | 10k | R1,R2,R3,R4,R5,R6,R7,R8,R9,R10,R11,R12 | 12 | R_0603_US | |
| 12 | P1 +15 RLY | U1 | 1 | Relay_SPDT | _ioXVvt31m |
| 13 | P2 +9 RLY | U2 | 1 | Relay_SPDT | _ioXVvt31m |
| 14 | P3 +6 RLY | U3 | 1 | Relay_SPDT | _ioXVvt31m |
| 15 | P3-GND RLY | U4 | 1 | Relay_SPDT | _ioXVvt31m |
| 16 | Header-Male-2.54_1x10 | H1 | 1 | Header-Male-2.54_1x10 | |
| 17 | Header-Female-2.54_1x10 | J4 | 1 | Header-Female-2.54_1x10 |
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