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STD Nixie Driver Design Prototype Using R|Z568M Dalibor Farny Nixie Tubes

License: Public Domain

Mode: Editors' pick

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Update time: 2022-03-29 09:30:08
Creation time: 2018-05-31 08:23:39
Description
This is a design for a six tube nixie clock and uses R|Z568M tubes by Dalibor Farny. As it is, at the moment, the design should be regarded as a prototype. The clock is designed to run 'stand-alone' without any internet connection for time synchronisation. There is a real time clock module on the board along with a battery backup. All processing of time data is carried out by an ATMega328 chip and the board has the appropriate header pins to allow in-circuit programming of this microcontroller.
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ID Name Designator Footprint Quantity
1 10k R10,R7,R8,R9,R13,R18,R19 2512 7
2 ICSP P6 HDR2X3 1
3 6x6x7 S1,S2,S3 KEY-6.0*6.0-2 3
4 3.3k R11,R17 2512 2
5 204-10UYC/S530-A3 LED1,LED2 LED-1206 2
6 25m R12 2512 1
7 1.3M R14 2512 1
8 DS3231MZ+ U10 SOIC-8_150MIL 1
9 ES2FHE3_A/I D1 SMB(DO-214AA) 1
10 20MHz X1 3213 1
11 ATMEGA328PB-AU U9 TQFP-32_7X7X08P 1
12 LF50CDT-TR U12 TO-252 1
13 26.7k R1,R2,R3,R4,R5,R6 2512 6
14 1k R16,R20 2512 2
15 1M R21 2512 1
16 IRF644SPBF-ND Q1,Q3 D2PAK 2
17 1u C15,C16 2512 2
18 2016L300DR F1 1206 1
19 5k R15 3361P 1
20 0.1u C2,C4,C5,C6,C7,C3,C8,C1 1812 8
21 0.1u C9,C10,C12,C14,C17 2512 5
22 2.2u C11 2512 1
23 10n C13 2512 1
24 POWER_JACK J1 POWER_JACK_SMD_OVERPASTE_TOE 1
25 SST2222AT116 Q2 SOT-23(SOT-23-3) 1
26 R|Z568M T1,T2,T3,T4,T5,T6 R|Z568M 6
27 MAX1771 U11 SOIC-8 1
28 TPIC6B595 U1,U2,U3,U4,U5,U6,U7,U8 SOIC-20_300MIL 8
29 CR2032-BS-5-1 B1 BATTERY_HOLDER_2032 1
30 150uH L1 5D28(5.7*5.7*2.8MM) 1

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