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2.The process supports design scales of 300 devices or 1000 pads

3.Supports simple circuit simulation

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1.Brand new interactions and interfaces

2.Smooth support for design sizes of over 5,000 devices or 10,000 pads

3.More rigorous design constraints, more standardized processes

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Update time: 2019-11-18 20:44:29
Creation time: 2019-11-15 21:46:34
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ID Name Designator Footprint Quantity
1 TBLOCK-M2 300V-GND,OUT-GND TBLOCK-M2 2
2 OptoAcoplador U4 DIP-4_L4.6-W6.5-P2.54-LS7.6-BL 1
3 470K R2 RES-TH_BD4.0-L11.5-P14.50-D0.7 1
4 0.1u C2 RAD-0.1 1
5 1u C3 RAD-0.1 1
6 TBLOCK-3 12V-5V-GND TBLOCK_3 1
7 TL494 U3 DIP16 1
8 LM741 U5 DIP-8_L11.0-W7.6-P2.54-LS7.6-BL 1
9 MUR860 D1 TO-220AC_L10.0-W4.5-P5.08-T 1
10 IRF840 Q3 TO-220AB 1
11 MPSA56G Q2 TO92-INLINE 1
12 MPSH10 Q1,Q4 TO92-INLINE 2
13 4.7k R1,R3 AXIAL-0.3 2
14 2.2k R4,R5 AXIAL-0.3 2
15 1k R6,R8,R10,R11,R12,R13,R14,R15 AXIAL-0.3 8
16 33k R7 AXIAL-0.3 1
17 10k R9 AXIAL-0.3 1

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