Editor Version ×
Standard

1.Easy to use and quick to get started

2.The process supports design scales of 300 devices or 1000 pads

3.Supports simple circuit simulation

4.For students, teachers, creators

Profession

1.Brand new interactions and interfaces

2.Smooth support for design sizes of over 5,000 devices or 10,000 pads

3.More rigorous design constraints, more standardized processes

4.For enterprises, more professional users

Ongoing

STD DAC8830TestBoard

License: Public Domain

Mode: Editors' pick

  • 348
  • 0
  • 0
Update time: 2018-06-09 00:23:57
Creation time: 2018-06-06 23:47:30
Description
Empty
Design Drawing
schematic diagram
1 /
PCB
1 /
The preview image was not generated, please save it again in the editor.
ID Name Designator Footprint Quantity Mounted
1 DAC8830ICD U16 SOIC-8 1 Yes
2 MAX6225BCSA+ U15 SOIC-8 1 Yes
3 MIC5219-3.3YM5 U11 SOT-23-5 1 Yes
4 100nF C15,C19,C14,C8,C21 0805 5 Yes
5 10uF C18,C13,C7,C20 0805 4 Yes
6 2.2uF C16,C6 0805 2 Yes
7 1uF C17,C3 0805 2 Yes
8 100k R2 RES-ADJ_3296W 1 Yes
9 470pF C9 0805 1 Yes
10 742792651 Ferrite Bead L2,L1,L3 0603 3 Yes
11 10 R1 0805 1 Yes
12 22uF C10,C2,C4,C11 0805 4 Yes
13 Header2.54mm 1*3P P3,P1 HDR-3X1/2.54 2 Yes
14 LM7705MM/NOPB U13 VSSOP8 1 Yes
15 4.7uF C1 0805 1 Yes
16 OPA277UA U17 SOIC-8_150MIL 1 Yes
17 10k R3 RES-ADJ_3296W 1 Yes
18 PCB Test Bead U12,U10,U9,U8,U7,U5,U3,U2,U1,U6 PCB TEST BEAD 10 Yes
19 2.54mm Terminal Block U18,U19,U20,U21,U22 2.54MM TERMINAL BLOCK 5 Yes
20 AD8630ARUZ U14 SSOP14 1 Yes

Unfold

Project Attachments
Empty
Project Members
Related Projects
Change a batch
Loading...
Add to album ×

Loading...

reminder ×

Do you need to add this project to the album?

服务时间

周一至周五 9:00~18:00
  • 0755 - 2382 4495
  • 153 6159 2675

服务时间

周一至周五 9:00~18:00
  • 立创EDA微信号

    easyeda

  • QQ交流群

    664186054

  • 立创EDA公众号

    lceda-cn