V2 of my Z80 SBC project, with the end goal of having color graphics(?) along with a BASIC interpreter based off of NASCOM BASIC. A future revision may include support for CP/M.
Feel free to clone this project. Just be sure to acknowledge me as printed below:
Copyright Jacob Hahn 2019.
This documentation describes Open Hardware and is licensed under the
CERN OHL v. 1.2.
You may redistribute and...
A single board computer based on the Zilog Z80 processor.
This work is licensed under the Creative Commons Attribution-NonCommercial-ShareAlike 3.0 Unported License. To view a copy of this license, visit http://creativecommons.org/licenses/by-nc-sa/3.0/ or send a letter to Creative Commons, PO Box 1866, Mountain View, CA 94042, USA.
This is an card for a Z180-CPU for the RC2014 (2x40 bus). It offers 512KByte RAM(upper - starting at 8.0000h) and 512KByte ROM (lower - starin at 0.0000h).
The Version 4 contains connectors for the address lines A16, A17, A18 and A19, for the Refresh-Line. This module can be used with other Z180 modules
The design is based on SMBakers 64k memory module (www.smbaker.com).
Pageable 64k RAM memory module using 2x 32k RAM chips a 64kb ROM (16/32kb).
I recommend using SCMonitor R3 with this module for ordinary operation.
The module has been modified to be working with the #28 Z180 CPU module and SCMonitor 1.00 43.
Address selectable, the default address is $38.