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2.The process supports design scales of 300 devices or 1000 pads

3.Supports simple circuit simulation

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1.Brand new interactions and interfaces

2.Smooth support for design sizes of over 5,000 devices or 10,000 pads

3.More rigorous design constraints, more standardized processes

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Update time: 2021-04-09 14:06:08
Creation time: 2018-02-07 10:40:43
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ID Name Designator Footprint Quantity
1 CD4093BE U1,U2 DIP14 2
2 NE555P U3 DIP8 1
3 2N2222 T1,T2,T3 TO92-EBC-OVAL 3
4 DIODE D1,D2,D3 DIODE-1N4148 3
5 IRF740S U4 TO-220-SPREAD 1
6 1k R2,R5,R6,R7,R8,R9,R1,R3,R4,R10,R11 R3 11
7 470uF C1 CP_8X13MM 1
8 1u C6,C2,C5,C3 C1 4
9 1u C8,C4 CP_8X13MM 2
10 SIP1 P5,P1,P7,P4,P6,P9,P10,P11,P12 HDR1X1 9
11 LM7805 LM7805 TO-220 1
12 LM7812CV LM1 TO-220 1
13 1N4001 D5 DO35-7 1

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