This is a work in progress, untested. This design (both schematic and board layout) is in public domain. This is a 23.5mm by 18.5mm (0.925" by 725", or 15/16" by 3/4") hand-solderable DC-DC converter, intended to power 3V microcontroller projects (with typically smaller current draws, but capability of providing at least 2A continuously if need be) from 4.5V to 13.5V sources, with peak efficiency around 200mA to 500mA, but over 91% efficiency at 2A. The main chip is TI TPS54308DDCR in SOT-23 package. There are two 100 nF 0603 ceramic capacitors, nine 10 µF 0805 ceramic capacitors, and a 100 µF electrolytic capacitor. The output voltage is set using two 0603 resistors: one 100 kOhm, and the other between 20.5 kOhm and 31.6 kOhm. See the schematic for suggested values. Components are chosen from LCSC, for easy ordering from JLCPCB and LCSC; as of 2020-10, they cost about USD $3 - $4. Do note that the default output is 3.0V, with a 24.3 kOhm resistor; replace it with the 0603 resistor you need. Unlike the TI datasheet recommended layout, this has components on both sides of the two-layer PCB. The VIN, GND, and OUT pins are on a 5.08mm = 0.2" = 200mil pitch. The hole in one corner is there just in case it is needed for fastening. When soldering, the TPS54308 should be soldered first, then the 100 nF capacitor on the same side and the 100 kOhm resistor, then the other 0603 resistor, then the two 10 µF capacitors near the center of the board. Follow up with the rest of the capacitors. On the bottom side, solder the two 10 µF capacitors first, then the 100 nF 0603 capacitor, and finally the shielded inductor. (You can use 12 µH instead of 15 µH shielded inductor.) Basic idea was obtained using [TI Webench Power Designer](https://webench.ti.com/power-designer/switching-regulator), with Vin between 4.5 and 13.5, nominal 5.15; Vout 3.0 at 2 A, nominal 0.050 and 0.1 (%) max ripple; high efficiency design; 30 max ambient temperature, 0603 minimum package size, using ceramic capacitors, shielded inductors, and showing all topologies. Choosing IC Package: SOT-23-THIN, the most efficient suggested design uses the TPS54308DDCR. That design uses X7R 22 µF capacitors (18 µF derated on input, 64µF derated on output), but I wanted to "standardize" on 10 µF 50V X7R ones in 1206 package. The Samsung CL31B106KBHNNNE ones are ±10%, and this design has 100 nF + 2×10 µF + 100 µF on input, 100 nF + 7×10µF on output, which should suffice.