Platform for creating and sharing projects - OSHWLab

great thank you i will sure join and learn about it

Please check: https://oshwlab.com/hawaii0707/fujitsu-f-07c-docking-station-v3

Hello, I am not sure but I don't think that my post is in the good forum. I wanted to know if my circuit seems to be correct or no. Have a good day.

You may find this topic from the old forum helpful: https://easyeda.com/forum/topic/Understanding-Ratlines-371bdbf646c54b23a57451eb05b2026d In EasyEDA, any net that is connected to any other net purely by copper can only have one netname. There is no way to distinguish between two parts of the same net by naming them separately. So a net in the schematic is the same net everywhere it appears even if the connection is not made by wire but by netlabel. Similarly, a net in the PCB is the same net everywhere it appears even if the connection is made by different width tracks or any combination of tracks, copper areas and vias. Nets can only have different names if they are physically separated even if only by a zero ohm resistor or a wire link. So, for example a so-called Analogue VDD and a Digital VDD connection to a chip can only have separately named nets going to them if there is a physical component in series somewhere that separates them. f the two pins are joined purely by copper, no matter how, then they must be connected together by the same net name. The same is true of course for ground connections. Note that the net link symbol in EasyEDA Pro does not appear to actaully function as a net splitter.