You need to use EasyEDA editor to create some projects before publishing
icecool2
Moving part from top to bottom layer
posted by icecool2 , 5 years ago. replied by icecool2 , 5 years ago.
2070 4
jcfor3ver
Pathing doesn't recognize connection
posted by jcfor3ver , 5 years ago. replied by andyfierman , 5 years ago.
662 2
jcfor3ver
Autoroute not working
posted by jcfor3ver , 5 years ago.
506 0
Impuls
Problems with exporting DXF format
posted by Impuls , 5 years ago. replied by Impuls , 5 years ago.
629 2
redsunwit
843 1
miggarc
Increase Footprint Manager and Library Manager preview window
posted by miggarc , 5 years ago. replied by mixkef , 5 years ago.
516 3
MR farby
[IN_NEED_OF_HELP]Converting a single schematic from project to PCB
posted by MR farby , 5 years ago. replied by MR farby , 5 years ago.
1541 2
olamide2006
Bottom Layer
posted by olamide2006 , 5 years ago. replied by andyfierman , 5 years ago.
357 3
miggarc
Penalization (or perhaps penalisation) current costs ?
posted by miggarc , 5 years ago. replied by UserSupport , 5 years ago.
936 1
عبد الكريم محمد
SOLDERED TRACK
posted by عبد الكريم محمد , 5 years ago. replied by andyfierman , 5 years ago.
373 4
campo201904
Footprint ICL7135
posted by campo201904 , 5 years ago. replied by campo201904 , 5 years ago.
424 2
redsunwit
cannot get expe cted result
posted by redsunwit , 5 years ago. replied by andyfierman , 5 years ago.
756 7
miggarc
Forum Avatar doesn't change
posted by miggarc , 5 years ago.
592 0
koosjr
PCB ordered to be Matt Black but came with no colour
posted by koosjr , 5 years ago. replied by andyfierman , 5 years ago.
2915 25
ds380
Min. Edge Rails limitation
posted by ds380 , 6 years ago. replied by andyfierman , 5 years ago.
3972 4
danielweckert
Transistor doesn't switch in simulation
posted by danielweckert , 5 years ago. replied by andyfierman , 5 years ago.
1020 1
Fred
platted edge design
posted by Fred , 5 years ago. replied by MikeDB , 5 years ago.
1228 4
redsunwit
how to probe voltage in simulation
posted by redsunwit , 5 years ago. replied by andyfierman , 5 years ago.
916 2
cc_CGB
Routing warning message
posted by cc_CGB , 5 years ago. replied by andyfierman , 5 years ago.
513 1
wellinkstijn
can you make a ttl transistor
posted by wellinkstijn , 5 years ago. replied by andyfierman , 5 years ago.
485 5
BdT141
Direct output to JLCPCB not applying $2 deal
posted by BdT141 , 5 years ago. replied by MikeDB , 5 years ago.
798 5
phamduyscb
dont create net name when connect two empty net
posted by phamduyscb , 5 years ago. replied by phamduyscb , 5 years ago.
461 2
aylashiv
How to do V-Cut for Round rectangular PCB?
posted by aylashiv , 5 years ago. replied by aylashiv , 5 years ago.
1952 6
Tommyboy
843 2
phamduyscb
Don't change all Net name when connect
posted by phamduyscb , 5 years ago. replied by phamduyscb , 5 years ago.
436 3
البوصلة نيوز
Error In size in a lot of libs
posted by البوصلة نيوز , 5 years ago. replied by UserSupport , 5 years ago.
379 3
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