I have routed a small board in EasyEDA editor and exported it to the Gerber File. Then I checked it with EasyEDA gerber viewer and gerbv utility. It was ok. Then I decided to order a PCB with JLCPCB and in the preview window I've noticed that a copper area rendered incorrectly. Look at the upper pad of R5 - there was no such geometry in the project.
![pcbssbad.png](//image.easyeda.com/pullimage/rH52OHNdE9iPK9fWVvZ92N7HLTxUNbu89OzAzqh9.png)
The copper area clearance is 30mil on this layout. I've changed clearance to 29mil and JLCPCB preview rendered it correctly. Look at the same region:
![pcbssgood.png](//image.easyeda.com/pullimage/EZ08Vum4jownIMdej5G60WRj0JGXc9KWTOzrq0BJ.png)
I'm sure that this behavior was not intended and I don't know whoose bug is this: EasyEDA or JLCPCB but I've noticed it too late and already ordered PCB with this bug. The question is - will my PCB contain the bug as in the JLCPCB preview? Or it is just the preview render problem? Here is the project [https://easyeda.com/nwfalls/Sound-Impairment-Monitor](https://easyeda.com/nwfalls/Sound-Impairment-Monitor). Clearance is currently set to 29mil. If you want to try to reproduce the bug, you have to set top layer copper area clearance to 30mil.