EasyEDA allows holes of any arbitrary shape to be created in a PCB using the **Solid Region** PCB Tool to be set up as **Board Cutout** like this:   * Cut outs made using this tool do not generate any information in the Board Outline layer. However, in: [https://support.jlcpcb.com/article/68-instructions-for-ordering?_ga=2.108061638.554814221.1593717519-139248169.1592496815](https://support.jlcpcb.com/article/68-instructions-for-ordering?_ga=2.108061638.554814221.1593717519-139248169.1592496815) it says: **7\. Designs about slots/CUT OUT/ millings/ v\-cut** Please kindly make sure that the v-cut lines, cut outs, millings and slots are in the same layer with the board outline. If it is not in the same layer with the board outline, it will be missed. and: **12、About the items in the board outline** Basically, the board outline is to show what your PCB looks like when it is finished. So  all those need to be cut with the board outline should be added into the layer with the board outline, such as v-cut lines, slots, milling, cut outs.  * This appears to be saying that if a cut out in a PCB is made using the Solid Region tool set to Board Cutout then JLCPCB will ignore that cut out because it is not represented in the Board Outline layer.  * I am sure this is not true but for clarity can you please confirm that it is acceptable to define a board cut out, milling or slot using either the Solid Region tool set to Board Cutout or a shape drawn in the Board Outline? Thanks.