Hi i have created my first PCB layout. It inly has one connector and footprint on it and the other side will be holes for wires to be soldered.
So in the schematic i have just got the PCB footprint and then i was adding in all the other holes using pads in the PCB design, doing this and connecting the track to it creates DRC clearance errors where the track meets the pad, is there a way around this?
Chrome
87.0.4280.141
Windows
10
EasyEDA
6.4.14