For clarity, a couple of screenshots of silkscreen outlines separate and silkscreen outlines overlapping would probably be helpful to the people in JLCPCB. Then they can quickly understand the issue and could give a tick / cross sort of reply. :)

Here you go.  These are the standard 0805 EasyEDA library symbol. I believe R33 and R62 are fine, I've never met a place that couldn't place them side by side. But some assembly houses have problems with R33 and R34 abutting. Does JLCPCB have any rules on close component placing ? <br> 

@MikeDB Hello Mike ; Kindly respect the minimum distance between two different nets and it will be fine for the assembly. Minimum trace width and spacing | Copper weight | Min. Trace width | Min. Spacing | Patterns | | ------------- | ---------------- | ------------ | -------- | | H/HOZ (Inner layer) | 5mil (0.127mm) | 5mil (0.127mm) |  | | 1oz (Outer layer) | 1/2 layers: 5mil (0.127mm)<br>4/6 layers: 3.5mil(0.09mm) | 1/2 layers: 5mil (0.127mm)<br>4/6 layers: 3.5mil(0.09mm) | | | 2oz (Outer layer) | 8mil (0.2mm) | 8mil (0.2mm) | | Any further questions just let me know. ^_^

Okay that's good.  Some assembly houses have problems with reflow as it pushes solder across the board and you get shorts if the resistors are too close.

@MikeDB For the small packages, we advise you to keep a distance between the tiny components to avoid any sort of accident Good luck and thank you for writing to us here.

@JLCPCBsupport, Please specify a minimum spacing and add this to the JLCPCB Capabilities page. Thanks.

@andyfierman @MikeDB Hello, I got a final clarification for minimum distance to keep between components for some packages as it shows the below images :   These parameters will be added to the capabilities page ASAP. Any further details just let me know. Thank you

Thanks.  I'll go through my designs and see if I've broken any of these. It looks like your process has the same spacing end-to-end as side-to-side.  This isn't always the case elsewhere.

@JLCPCBsupport  @andyfierman Could you add these spacings to the DRC in EasyEDA ?  It's taking ages to check every component.

@MikeDB, @EasyEDAsupport

@UserSupport, Please incorporate these minimum spacings into EasyEDA Design Rules. @JLCPCB, Please include these minimum spacings into the JLCPCB Capabilities page. Thanks.

@andyfierman @MikeDB It will be implemented at EasyEDA Pro.