Guide to Panelization of Board for PCB Assembly
288 5
Banjobeni 2 weeks ago
This guide is relevant if you want the following: * panelize a PCB design, and * have a ground plane (copper fill) * use SMT assembly at JLCPCB It covers a shortcoming (unsuitable for ground plane (copper fill)) of [https://docs.easyeda.com/en/PCB/Panelize/index.html#Panelize-by-Manually](https://docs.easyeda.com/en/PCB/Panelize/index.html#Panelize-by-Manually) I wrote this guide so I don't have to reinvent the wheel next time I need one. I have sucessfully used it and confirmed that the PCBs ordered with assembly work as I intended. However, I will not take any responsibility for the correctness of this guide. USE AT YOUR OWN RISK. Based on at least one EasyEDA hack/bug, so it may cease to work with newer versions. Tested on V6.3.43. 1\. Fully design and finish your single board\, including DRC\. ![image.png](//image.easyeda.com/pullimage/CXvPbSPXpRo30ANGvKov7VsmgqJyAfI9bNSFUW37.png) 2\. Clone PCB design to new file \(named XY\_Panelized\) in same project\. ![image.png](//image.easyeda.com/pullimage/pDe3TRRr5WSt99wspwTielvWjIHTqFXXEo3n9Ck1.png) 3\. Use the built\-in "Panelize" function to initially panelize the board\. ![image.png](//image.easyeda.com/pullimage/dfiZQgrdfVO8U1JWr9dTS3HiXzk4xNq24iEJTiSA.png) ![image.png](//image.easyeda.com/pullimage/RvVg1kzU2sXgv0vLwkupV0Q5AJwciaqPsFRbwQ9T.png) Note that only the outline is panelized. All the components and layout are not copied. Let's call the upper left board that has all the components and layout the "primary board". 4\. Clone the primary board to all secondary boards\. Select the complete primary board including outline\. ![image.png](//image.easyeda.com/pullimage/FrvzsuZg4QN34xntbqc9Glh8Y0USGoCtefjpUPXb.png) ![image.png](//image.easyeda.com/pullimage/Ozorw9ZYCQORQeHiukThyexawD62MTwNmjO08d1c.png) 6\. Use Ctrl\+Shitf\+C to copy by reference point\. Use the upper left corner as reference point\. Make sure you hit the corner of the primary board outline exactly\, zoom in as needed\. ![image.png](//image.easyeda.com/pullimage/iVcWJcRtdn0PY3LvxQJtWsNNsNBJWyZM9SPKFeU5.png) 7\. Use Ctrl\+Shift\+V to paste by reference point\. Again\, make sure that you hit the corner of the secondary board exactly\. ![image.png](//image.easyeda.com/pullimage/co9dlNHW2Vv9cxvtQ3NNfKi4yph0qOTTLh6tYzsn.png) 8\. If everything is done correctly\, all of the primary board including the copper area is copied\. Note that since we enabled panelization \*and\* we also copied the outline of the primary board\, the panelization will be extended and look wrong\. We will fix this later\. \(Copying outline in this step is \*required\* because otherwise the copper area will not copy correctly\!\) ![image.png](//image.easyeda.com/pullimage/pfiOJgk2av5LhJzknwWbcxJMRAaxaZT2dy28FRCJ.png) 9\. Repeat as needed until all secondary boards are copied\. ![image.png](//image.easyeda.com/pullimage/spmfd1yBNc3Bxl9raqHzFZBDMhJEImymK8f26rPA.png) 10\. Now we can fix the panelized outline\. For every secondary board\, select and delete the outline\. \(This will NOT delete/destroy the ground plane and is\, in essence\, why this guide works\!\) ![image.png](//image.easyeda.com/pullimage/7HJmmfUZwSdr2JVCkHyA8gGhmcX9HrckgyYsQMIC.png) 11\. Open the Panelize Dialog and set to "No Panelize"\. All of the purple lines should be removed except for the primary board outline\. This will clean up the outline mess that we made\. ![image.png](//image.easyeda.com/pullimage/NP5TBg2V71e4oDCgUsFdSQ4j7j4np2NksvJcpea9.png) 12\. Then re\-enable panelization\, with the exact same settings as before\. ![image.png](//image.easyeda.com/pullimage/5huRbNfpxx77I6Mg8yaM145kexrYMsRHPf1PWdaT.png) 13\. You should now have a panelized board that a\) includes all components and layout on all sub\-boards b\) includes the ground plane for all sub boards and c\) has the correct outline for you panel\, including stamp holes\. You can generate gerber files for the panel and upload to JLCPCB\.
Comments
JLCPCBsupport 2 weeks ago
Well done !!
Reply
xpixer 1 week ago
Hello JLCPCB Support, instead of writing "Well done !!!" **you should at least fix this panellize function**!!! It can't be that the customers have to write a workaround just because you are not able to provide the function properly ... the least I expect is that this post will be linked in your FAQ.
Reply
JLCPCBsupport 1 week ago
@xpixer Tottaly understand. We will consider your request and we will add the post to the feature request category to be handled ASAP.
Reply
xpixer 1 week ago
Please check this, i demonstrate this Tutorial  :) [https://www.youtube.com/watch?v=GIxAq0j_has](https://www.youtube.com/watch?v=GIxAq0j_has)
Reply
Kai Chun Chou 2 days ago
What about the BOM and CPL files? Do we need to manually update the BOM?
Reply
Login or Register to add a comment
goToTop
你现在访问的是EasyEDA海外版,使用建立访问速度更快的国内版 https://lceda.cn(需要重新注册)
如果需要转移工程请在个人中心 - 工程 - 工程高级设置 - 下载工程,下载后在https://lceda.cn/editor 打开保存即可。
有问题联系QQ 3001956291 不再提醒
svg-battery svg-battery-wifi svg-books svg-more svg-paste svg-pencil svg-plant svg-ruler svg-share svg-user svg-logo-cn svg-double-arrow
We use cookies to offer you a better experience. Detailed information on the use of cookies on this website is provided in our Privacy Policy. By using this site, you consent to the use of our cookies.