Hi all,
I'm designing a new PCB layout which will be quite tight. I would like to use via in pads to simplify my design. To do this without the solder going through the hole I would use copper capped vias, also called blind vias, which now seem to be a quite common design practice.
How could I do this in EasyEda?
Regards,
Jean-Michel Gonet
EDIT: I've changed the category of the post to JLCPCB, as suggested by Andy
![Capped Via vs Normal Via](//image.easyeda.com/pullimage/rRrojw1EpkLeq9bg5OquuhCS3vK2HWsDhaoxegyG.png)
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