Hello,
For several home projects a try to create a "controller card" with STM32MP151DAC1 with package TFBGA361 to use a lot of input/output.
I already have the most important chips in stock. (SOC, RAM, Flash, Ethernet, PMIC and hub USB)
Now, I try to test routing between RAM and SOC to determine the routing constraints and see how to place components.
Now the issue :
TFBGA361's pad (outside) : diameter 0,3mm 1 Center pad to center pad 0,5mm. There is 0.2mm of space left.
I try to use 4 layers.
Footprint:
![image.png](//image.easyeda.com/pullimage/ja0lJvpQoUhro2W2mpQ6vCGtfHYQax8hsOnYvIQR.png)
Now, look at left pads.
Outside I can pull out wire directly or use via.
But inside (pad in red zone), I can't pull out wire directly.
![image.png](//image.easyeda.com/pullimage/XRLupzrJckek7u70t98uBwBOXaqX84sCEgut8Ym9.png)
JLCPCD capabilities to BGA:
![](https://jlcpcb.com/client/image/pcbCapabilities/bga.1bf8eb13.jpg)
capabilities with via is 0,2mm to hole and 0,4mm to diameter.
capabilities with trace 0.09mm
capabilities with spacing 0.09mm
There should be 0,27mm spacing to use trace.
![image.png](//image.easyeda.com/pullimage/sER9cZ6iVvuNtZEyjQ2bIxQItZLcI7iClnABxWMJ.png)
Via in center don't work.
![image.png](//image.easyeda.com/pullimage/kqx9ttcLYutZQw4EvmPTSaTX2jnFPk0WyqFkk4JD.png)
I deduce that routing is possible but how?
If pad are via, it's work. Is this going to cause soldering problems with reflow?
I have to put a via on each pad to have the same height for each pad? In this case, it doesn't work because I couldn't get the wires out.
Are the vias filled with resin to prevent sagging or rising air?
![image.png](//image.easyeda.com/pullimage/SHVU1maSMTYLnXNR0EuMjL6je6G4UYPDBf6UNdrA.png)
Do you know how can I route it?
Thanks in advance.
Chrome
90.0.4430.58
Windows
10
EasyEDA
6.4.19.4