The Cloned Baseline Schem File Won't Recognize the Cloned PCB File to Make a Changes from RevA to RevB
73 9
DavidCook284 1 week ago
Hi Andy, This is a general file management question.  My lack of understanding of how file management within this program is preventing me from making changes for the next Rev while maintaining the previous version.   It would all work if I could save a copy into a different project, but things don't seem to be set up that way.   The idea is to make a baseline design/pcb and verify it works.   The next Rev (1.1) adds new features and fixes and save it in a new project without losing the previous version/info.  It's the Schem-to-PCB association I can't seem to make work. Specifically, I have cloned both the Schem(sheet 1) and the PCB from baseline into a new project (Same name + new features in file name).   However,  the schematic does not recognize the PCB as being associated with the Schem and re-adds all the components again.   I guess it wants me to re-layout the board again.  Not going to do that. How do I get the cloned Schem file to recognize the cloned PCB file in the same project folder? If  you need me to make my file public so you can see what's going on, I will. Thanks, Dave
Comments
andyfierman 1 week ago
I can't reproduce a problem like this with a clone of one of my projects. Please make your project - or one that demonstrates the problem - public.
Reply
DavidCook284 2 days ago
Andy, How do I make the project public? Thanks, Dave
Reply
andyfierman 2 days ago
Click the share icon.
Reply
DavidCook284 1 day ago
Andy, I selected share and it returned a window with paths and the only option is to cancel.   Here are the two paths from the pop-up winbdow: [https://easyeda.com/DavidCook284/tda7269a-w-pre-amp](https://easyeda.com/DavidCook284/tda7269a-w-pre-amp) [https://easyeda\.com/editor\#id=\|c65a13db5dff4d73ac660e5df5bb0044\|1be8f9be6a914a5ab827e955a0cab9a8](https://easyeda.com/editor#id=|c65a13db5dff4d73ac660e5df5bb0044|1be8f9be6a914a5ab827e955a0cab9a8) Thanks, Dave
Reply
andyfierman 1 day ago
I do not understand from your description if this project: [https://easyeda.com/DavidCook284/tda7269a-w-pre-amp](https://easyeda.com/DavidCook284/tda7269a-w-pre-amp) is a copy of your original version or if after cloning, you have made some changes to; 1. the schematic which have not been passed into the PCB or;  2. the PCB which has then made the connectivity of the PCB different from the schematic. Anyhow, whatever the reason for this is, at least part of the problem here is that the connectivity in the PCB: [https://easyeda.com/editor#id=6b82d63f4c714fb28a8445b9bea2b5d0](https://easyeda.com/editor#id=6b82d63f4c714fb28a8445b9bea2b5d0) is not the same as the connectivity in the schematic: [https://easyeda.com/editor#id=043545426c5949ceb620b4cba1582e6a](https://easyeda.com/editor#id=043545426c5949ceb620b4cba1582e6a) For example, the connectivity of the drain of Q2 in the schematic: ![image.png](//image.easyeda.com/pullimage/8zkyJMhANMH4C0c1b7wiRM3UBp70yZYFY3Vy3x27.png) is not the same as in the PCB, as can be seen by comparing the schematic above with the PCB below and from the ratlines and net names in it: ![image.png](//image.easyeda.com/pullimage/qis2hRzSSEFe4hu9Mfg1BgTOk3CUaUnqvypQrMoi.png) so when you try to update the PCB there are several connectivity changes that are required: ![image.png](//image.easyeda.com/pullimage/Z64aN42ES9Y5NHC7l6im1Evn8kaTgOlx3dJfaFE0.png) And after importing the changes there are then several connectivity mismatches which need to be rerouted in the PCB to correct: ![image.png](//image.easyeda.com/pullimage/jjiOhLyLNnfj97GI940dZn0yjYKYgjIHeDNK7TB0.png) There are also several clearance DRC errors both before and after doing import changes: ![image.png](//image.easyeda.com/pullimage/QFfGqfNaQGHnf6GX8awHMHLC31mWGySFKD8E3QrT.png) Rule 1 in EasyEDA is that the Schematic is the master document so **all connectivity and footprint changes must be made in the schematic first** and **then those changes imported into the PCB**. You must not make changes to connectivity and footprints in the PCB directly because then the validity between the checks made using the Design Manager in the schematic and the Design Manager in the PCB will be broken and there will be the sort of chaos that you are seeing with your project when you try to update the PCB. The Schematic Design Manager may tell you everything is OK in the schematic and the PCB Design Manager may tell you everything is OK in the PCB but they do not actually talk to each other so the only way you know that the PCB matches the schematic from which it is supposed to be created is that when you do an **Import Changes...** or an **Update PCB...**, there are no differences. I strongly suggest that you read (2) in: [https://easyeda.com/forum/topic/How-to-ask-for-help-and-get-an-answer-71b17a40d15442349eaecbfae083e46a](https://easyeda.com/forum/topic/How-to-ask-for-help-and-get-an-answer-71b17a40d15442349eaecbfae083e46a) and pay particular attention to the Design Flow diagram in the main Tutorial. I note that in your schematic, you say that you have lost some work during a save. Are you aware of these features of EasyEDA? [https://docs.easyeda.com/en/Introduction/Version-Control/index.html](https://docs.easyeda.com/en/Introduction/Version-Control/index.html) [https://docs.easyeda.com/en/Introduction/Basic-Skill/index.html#Histories-Record](https://docs.easyeda.com/en/Introduction/Basic-Skill/index.html#Histories-Record) [https://docs.easyeda.com/en/Introduction/Basic-Skill/index.html#Document-Recovery](https://docs.easyeda.com/en/Introduction/Basic-Skill/index.html#Document-Recovery) and the recycle bin: ![image.png](//image.easyeda.com/pullimage/XY07SI6XGBqFCErpy4I3BUr6yOomof6mprhwt086.png)
Reply
DavidCook284 1 day ago
Hi Andy, Thank you.  You've got a lot of material here.  It'll take me some time to chew thru it. I always make the schematic master and want the PCB to follow the schematic and any changes I make there.  My approach is to make changes to the design in the schematic  first and want the PCB file to follow, but in this case I made copies of files  and dropped them in the folder.    Maybe the thing I should do is delete the portion of the PCB artwork that is not in alignment with the schematic. If I understood you, you're saying it will associate, but the PCB needs to be in much closer alignment with the schematic? Anyway,  I need to closely follow your response and make the necessary adjustments. Best regards, David
Reply
andyfierman 1 day ago
With the files as they are at the time I copied them from your public project all you need to do is: 1) check that the schematic is correct (edit as required) then: 2) do the checklist in (4) in (2) in: [https://easyeda.com/forum/topic/How-to-ask-for-help-and-get-an-answer-71b17a40d15442349eaecbfae083e46a](https://easyeda.com/forum/topic/How-to-ask-for-help-and-get-an-answer-71b17a40d15442349eaecbfae083e46a) 3) then do Update PCB; 4) reroute tracking as required.
Reply
andyfierman 1 day ago
After you have updated and rerouted the PCB as necessary then do the checklist in (6) in (2) in: [https://easyeda.com/forum/topic/How-to-ask-for-help-and-get-an-answer-71b17a40d15442349eaecbfae083e46a](https://easyeda.com/forum/topic/How-to-ask-for-help-and-get-an-answer-71b17a40d15442349eaecbfae083e46a)
Reply
DavidCook284 1 day ago
Ok. Thanks, David
Reply
Login or Register to add a comment
goToTop
你现在访问的是EasyEDA海外版,使用建立访问速度更快的国内版 https://lceda.cn(需要重新注册)
如果需要转移工程请在个人中心 - 工程 - 工程高级设置 - 下载工程,下载后在https://lceda.cn/editor 打开保存即可。
有问题联系QQ 3001956291 不再提醒
svg-battery svg-battery-wifi svg-books svg-more svg-paste svg-pencil svg-plant svg-ruler svg-share svg-user svg-logo-cn svg-double-arrow
We use cookies to offer you a better experience. Detailed information on the use of cookies on this website is provided in our Privacy Policy. By using this site, you consent to the use of our cookies.