Misaligned drill holes: problem with EasyEDA or gerbv 2.7.0?
posted by andyfierman ,
3 years ago.
replied by andyfierman ,
3 years ago.
DRC Clearance Issue between Copper layer VCC to Copper layer GND
posted by Yariv Hashai ,
3 years ago.
replied by andyfierman ,
3 years ago.
Is there a way to add VIA with the API?
posted by Yariv Hashai ,
3 years ago.
replied by andyfierman ,
3 years ago.
wire wrap prototype
posted by Alain Falcoz ,
3 years ago.
replied by andyfierman ,
3 years ago.
I want to make esp-32 (38 pins ) sheild with connectors (only headers and connectors pads on the final pcb board
posted by Arabian Hunter ,
3 years ago.
replied by Arabian Hunter ,
3 years ago.
PAD thermals, how to change spoke width.
posted by Kookavitch ,
3 years ago.
replied by andyfierman ,
3 years ago.
Lost Project
posted by goddur ,
3 years ago.
replied by andyfierman ,
3 years ago.
How to create separate moveable subparts in schematic
posted by HTDvN ,
3 years ago.
replied by andyfierman ,
3 years ago.
Export 3D PCB for fusion360
posted by Amir Tadros ,
3 years ago.
Custom made motherboard
posted by Game Series ,
3 years ago.
replied by Game Series ,
3 years ago.
Arranging parts in PBC using API javascript code
posted by Yariv Hashai ,
3 years ago.
replied by Yariv Hashai ,
3 years ago.
DRC Issue
posted by chrisnms ,
3 years ago.
replied by andyfierman ,
3 years ago.
Shipping to UK and VAT registration
posted by Pete Matthews ,
3 years ago.
replied by Ryan Banks ,
3 years ago.
Panelizing PCB with space between rows
posted by zero1 ,
3 years ago.
replied by andyfierman ,
3 years ago.
RATLINES
posted by Francisco Gutierrez ,
3 years ago.
replied by andyfierman ,
3 years ago.
Footprint modification and future use of the modified item
posted by JetDefloor ,
3 years ago.
replied by andyfierman ,
3 years ago.
API: createShape is missing shapeType SVGNODE
posted by andreasbernhofer ,
3 years ago.
replied by andreasbernhofer ,
3 years ago.
How to create rev B: schematic and PCB later
posted by YigalB ,
3 years ago.
replied by andyfierman ,
3 years ago.
VCC and GND allocation on a Custom IC design
posted by JohnAlfred ,
3 years ago.
replied by JohnAlfred ,
3 years ago.
Problem with LTspice in EasyEDA opening encrypted LTspice subckts?
posted by andyfierman ,
3 years ago.
Creat a heatsink model for 3D display
posted by mawyatt ,
3 years ago.
ground plane connection missing between pads
posted by ginopaolo ,
3 years ago.
replied by andyfierman ,
3 years ago.
How to remove the exposed copper (close the solder mask aperture) in a through hole pad
posted by andyfierman ,
3 years ago.
replied by andyfierman ,
3 years ago.
Getting a TL072 LTSpice subckt to work
posted by Zoldar71 ,
3 years ago.
replied by andyfierman ,
3 years ago.
USB formal names in EELIB
posted by Burt Harris ,
3 years ago.
Heat Vias and an invisible Copper Pour
posted by JulesP ,
3 years ago.
replied by andyfierman ,
3 years ago.
Can somone make me a schematic?
posted by Exosceleton ,
3 years ago.
replied by Markus_ee ,
3 years ago.