In the post below I describe away to avoid DRC errors created when placing thermal vias in a pad.post:
[https://easyeda.com/forum/topic/How-to-place-multiple-vias-in-a-PCB-footprint-a34cf68d58414138898a56de60abd8c1](https://easyeda.com/forum/topic/How-to-place-multiple-vias-in-a-PCB-footprint-a34cf68d58414138898a56de60abd8c1)
If the thermal pads are required to have a solid connection to surrounding copper on other layers then the way to deal with this is to set the main pad (within which the multi-layer thermal pads have been placed) to be a multi-layer pad.
Then, if spoked connections to the surrounding copper are required, the pad within which the thermal pads are placed will be connected by spokes but will ovelap any spokes formed around the thermal pads.
One point to be careful of is that if the thermal pads are placed too close to the edge of the main pad then the cutouts between the normally hidden spokes for each each thermal pad will be visible around the edge of the main pad making it look like the perforations around a postage stamp.
However a much simpler solution to all of these issues would be to add a Pad Number attribute to Vias but to still inhibit the formation of spokes around them.
Chrome
79.0.3945.79
Ubuntu
EasyEDA
6.3.22