Hi Hyperterminal, Welcome to EasyEDA. I can see some of the things that are fouling up your simulation. Most of them are understandable mistakes for a beginner so no problem. :) In any tool, simulation is not easy to get the hang of. It's just that some are easier than others! So first off **we strongly recommend that you work your way through the EasyEDA Simulation eBook**: https://docs.google.com/document/u/1/d/1OWZVVFRAe_2NW3WratpkA_SGuHa5AcRow5ZRfvcoVTU/pub (The copy on the EasyEDA tutorials pages still has some problems with the Table of Contents and we have been too busy with the October upgrade to fix it.) Next have a look at: https://easyeda.com/forum/topic/How_to_find_simulatable_parts_in_EasyEDA-1YgasK2kC Once you've done that you'll better understand the following description of why your sim isn't working as expected. 1. If you do **Super Menu > Miscellaneous > Netlist for Document > spice...** you will see the spice netlist for your sim. If you look at it carefully, you will see that it has nothing in there to do with the OP27. That's because, at the time of your creating this sim, there was no spice model for the OP27EPZ in EasyEDA. However, if you now do a `SHIFT+F` search for `OP27_AD` you will find a symbol with a suitable model. Note that the offset pins of the OP27/OP37 devices are not modelled. If you need other variants of the OP27/OP37, please post back. 2. Although this does not stop your circuit from simulating, there's no point in modelling things that do not affect the simulation. In this simulation, the connectors are completely ignored anyway as they have no model associated with them. So, you could remove the connectors: at audio they just look like negligibly small series resistors and parallel capacitances. In fact in EasyEDA, there are only a very small number of connectors that have spice models and most of those are for special functions. (BTW, although you have not put them in your sim, the same applies to supply decoupling caps: if they are connected directly across spice ideal voltage sources as you have used in your sim, they have no effect. This is because a capacitor across an ideal voltage source never sees any AC signal component.) 3. The input voltage source, V3, you have chosen is from a poorly configured family of sources that we still have not had time to fix. For a solution, please see: https://easyeda.com/forum/topic/Please_fix_the_expressions_in_or_remove_the_EasyEDA_Sources_-znhzsK2ke 4. The names on Volprobes overwrite any names you have manually assigned to nets. Therefore you must give volprobes the same name as the nets to which they are attached. Please see: https://docs.google.com/document/u/1/d/1OWZVVFRAe_2NW3WratpkA_SGuHa5AcRow5ZRfvcoVTU/pub#h.z337ya and https://easyeda.com/forum/topic/Net_naming_conventions-uOHBvN5nh 5. There is also a basic design error. You cannot feed a voltage source directly into the inverting input of an opamp connected as an inverting amplifier. The negative feedback round an opamp always tries to force the difference between the inverting and non-inverting inputs to zero. If you assume for the simplicity that the opamp is ideal so it draws no input currents, has no input offsets, has infinite gain and zero output resistance but an output voltage swing that is limited to the supply rails then it should be relatively easy to see that **any** voltage imposed on the inverting input that is not **exactly** equal to that present at the non-inverting input will cause the opamp output to hit one or the other supply rail as it tries to force the difference between the inverting and non-inverting inputs back to zero. IOW, if the opamp has infinite gain, the **only** voltage difference between the two inputs that does not force the output to hit the rails is zero. In this last point, you can either feed a current in to the inverting input (also referred to as a virtual earth point) or you can add a series resistor to convert an input voltage into a current. * For more on opamps see: https://en.wikipedia.org/wiki/Operational_amplifier * You could also try cloning: https://easyeda.com/andyfierman/How_an_ideal_opamp_behaves_-43d981935602431abdb02faadf6b2ce1 and playing with it to get an idea of how opamps behave. :) If you fix points (1), (4) and (5), your circuit will simulate just fine.

Hey there, Thanks heaps for taking the time to help out really appreciated! Looks like I have alot to work through! Ill start making my way through it now! I probably have a few questions but Ill hold off as I work through your list :) Thanks again it has been a very helpful response! Really appreciated.

For info: Most of the major semiconductor manufacturers are a mine of useful info: http://www.ti.com/lit/an/slyt145/slyt145.pdf http://www.ti.com/lit/an/snoa586d/snoa586d.pdf http://www.ti.com/lit/an/snva530/snva530.pdf http://www.analog.com/en/education/search.html?q=*&Filters=resource_type_l2_fac_s:f8eadfaf64cf48afb4ad8b54198f6f2a_ff0fe204950d410a86fcfbe07d0464d8|resource_type_fac_s:f8eadfaf64cf48afb4ad8b54198f6f2a Have a look around OnSemi and Linear Technology too.

Hi Andy, Thanks again and I'll work through all your great feedback. I do have a quick question in the interim. In point 5 you mention not having voltage source going into the inverting input. What I was trying to do there (obviously wrong by the sound of it) was to replicate a 1k test tone into circuit via the audio input to then measure the frequency response of the phono post the RIAA eq. Once I fix the what you mentioned, what would be the best way to achieve measuring it? Sorry if my question sounds stupid! I thought I was approaching it the right way! Cheers!

Here's one I prepared earlier... https://easyeda.com/andyfierman/hyperterminal-02f05f333bc145f49a790b4f3793bc0b :)

tried a few other things, now I just get errors around simulation being to large! Ready to throw my laptop out window! :)

Hey Andy legend mate, Let me take a peek! Awesome! Was pulling my hair out. Hopefully I can see what your done and learn the errors of my ways! haha

Hi Andy, looks like its working pretty well! Thanks heaps for your help. It seems to follow a pretty close curve from a sim anyway. Now I just need to work out how to integrate a reverse RIAA into circuit to see how it looks :) But looking at the numbers it seems pretty close. Another quick question (if IM not stretching the friendship) I notice the CSV output only outputs up to 4hz is there a way to output the full range of the test?

Hopefully onto the next challange soon getting the brd done and ordering :)

Ah. I've never had any occasion to look at the CSV output before. If you open it in LibreOffice Calc (or some other spreadsheet package) the left hand column, `A`, is titled `frequency`. Actually the values in column `A` are LOG10(frequency)! If you add a new column `D` and make the values in the cells in column `D`: `=10^Ax` where `Ax` is the corresponding cell number in colum `A`. then the values in column `D` will represent the frequency in Hz. BTW: a reverse RIAA is just an RIAA not in a feedback loop. You'll find some excellent references here: http://sound.whsites.net/project80.htm http://waltjung.org/PDFs/A_High_Accuracy_Inverse_RIAA_Network.pdf http://www.hagtech.com/pdf/riaa.pdf * Before you launch into ordering PCBs, please be sure to check: https://easyeda.com/forum/topic/Essential_checks_before_placing_a_PCB_order-UuohztL3l EasyEDA is all free up to the point where you submit your order for the PCBs to us so you don't want to have to buy a second lot because there's an error in them... :)

If you are looking at things to do with RIAA equalisation, you might like this precision RIAA preamp circuit: https://easyeda.com/andyfierman/Phono_preamp_with_precision_RIAA_equalisation-3b139e34a43743af99f57bf07c9b633a :)

На панели кнопок нет кнопки моделирования хотя она включена. Что делать?

@Atsek, Since the V3.10.x upgrade: To run a simulation: После обновления V3.10.x: Для запуска моделирования: CTRL+R or: или: ![enter image description here][1] To open the simulation results window: Чтобы открыть окно результатов моделирования: ![enter image description here][2] [1]: /editor/20161118/582df73b038f1.png [2]: /editor/20161118/582df76c8a1eb.png