In: >https://easyeda.com/andyfierman/Tesseract_Guitar_Practice_Amp-MjP71jBni I created a dual footprint: >`C_ALUnTANT_D6n9mm_P1.5-5mm` to allow for the fitting of a range of aluminium or tantalum bead or dipped ceramic capacitors. It was easy enough to create and I added a track on the bottom layer only of the footprint to connect two of the three pads together to avoid confusion and wrong connections. The problem is that when running the Design Manager and checking for DRC errors in the PCB, every instance of the footprint generates one **track2Track** and one **track2pad** error. Although there are three holes, the two pads that are connected together are both numbered as pin 2 to avoid any problems with a pin mismatch since all the capacitors that fit onto the footprint obviously only have two pins. I did try having three pins but the DRC reported exactly the same errors. This does not stop the creation of valid Gerber files for the board but looks a bit unprofessional since the PCB should have no errors before Gerber generation. * So, my question is: does anyone know of a better way to create a dual footprint like this that does not generate errors? Thanks!