Some questions and comments. Where are your VM and 3V3 supplies coming from? Where is the voltage regulation for them? The nets between P3 and U1 do not seem to connect to anywhere else, i.e. they are not connected to U9. U9 on a board with only 3 chips on it? You need to tidy up your prefixes. When you run the DRC in the Schematic Design Manager, you will get warnings on multiple net labels on several of your nets. For more about this see: [https://easyeda.com/forum/topic/Multiple-net-labels-on-a-net-no-longer-show-a-warning-message-in-lower-left-of-Schematic-Design-Manager-f9a7569ac45140f09ec2dc3508b48af4](https://easyeda.com/forum/topic/Multiple-net-labels-on-a-net-no-longer-show-a-warning-message-in-lower-left-of-Schematic-Design-Manager-f9a7569ac45140f09ec2dc3508b48af4)

@andyfierman Here is the full outline of the project:  **But in here I used modules, now for the first time I am trying to change it to SMD**. Tell me where to add or remove what? If the arduino mega SMD is wrong, I will try to find a more correct option (template). Is the driver all right?

@kazbionics, "Is the driver all right?" I have no idea. You have said nothing about what your application is. You have given no information about the driver, motors, datasheet or specifications. Please read: [https://easyeda.com/forum/topic/How-to-ask-for-help-and-get-an-answer-71b17a40d15442349eaecbfae083e46a](https://easyeda.com/forum/topic/How-to-ask-for-help-and-get-an-answer-71b17a40d15442349eaecbfae083e46a)<br> <br> and then post your Design Requirements Specification and other information from which others may then be able to offer constructive advice.

@andyfierman I have a barrier project. I use an arduino mega pro microcontroller. To control the maxon 139885 motor, I use the TB6612FNG driver. And so, the prototype project works well for me. But for compactness, I want to make an SMD board. To do this, i need to assemble the SMD: arduino mega and TB6612FNG. I will upload the code via ICSP. As a beginner, I was looking for ready-made templates and schemes. And I came across this scheme in EasyEDA. But I don't know if it's right or not.