I have a board design that I have used with the autorouter with mostly complete success.
I have just changed some components on the board and now the autorouter (local) is completing but it is creating many DRC errors, mostly with duplicated traces for the same net all of which overlap other traces.
I have tried using the locally installed editor as well as re-downloading the latest autorouter and the result is the same:
![image.png](//image.easyeda.com/pullimage/vDTJX1nA3AKKOiYK8KA1R70740WnzxgmWYmlz7BP.png)
In the picture above you can see that the bottom layer traces appear to be overrun with traces on top of traces.
I have experienced this kind of behaviour before then some times it just seems to go away.
Is this expected behaviour or is there something I can look at changing to stop this happening?
I just tried removing all the trace widths for special nets and thought that had fixed it but on closed inspection there were still many errors:
![image.png](//image.easyeda.com/pullimage/W5wHAOGxARo3AVncNAsybdypHIBdsxfzcsIvB1yU.png)
![image.png](//image.easyeda.com/pullimage/nwVOsc0b2GEXIm6zsgEdvPXW7xg79YH99KM9WvQ5.png)
Interestingly, in the bottom picture, the same net had been routed twice, once successfully and once just cutting across lots of other traces.
It's as if the autorouter is applying traces and then not removing them as it tries other routes.
Also interestingly, for the first time I noticed errors in the autorouter screen:
![image.png](//image.easyeda.com/pullimage/ioqQXXT3XxucPv1g81XJSIy6667FqM0bBdCHZNxe.png)
Is this normal / expected behaviour?
\- Richard
Chrome
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Windows
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EasyEDA
6.4.7