I have this mostly finished PCB where I import a few changes and then ask the autorouter to finish routing the changes only.
I set the "skip routed nets" checkbox, and press Run, and get this answer:
![image.png](//image.easyeda.com/pullimage/tOfh8OgR0x8ZbOdlJekWxxO8p0wT1rLxSunV8oDB.png)
I don't know what Via is set, no changes was made to the PCB:
My expectations was that the attempted count was equal to the count of ratslines at least.
Electron
4.2.10
Windows
10
EasyEDA
6.4.7