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Board not routing entirely
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Jperky 7 years ago
As you can see, the J2 and J3 are only half routing. I've tried just routing those to the IC and it regardless of what i have it will only route half of the screw terminals pins. I've tried deleting and re-adding in the schematic and still it wont route it when i click route. I'm at my wits end, any help would be appreciated. ![enter image description here][1] [1]: /editor/20170604/593369d38f6b8.JPG
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dillon 7 years ago
Do you use autorouter or by hands? If autoouter, you need to set the router rules, https://easyeda.com/Doc/Tutorial/new.htm#Auto-Router
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Jperky 7 years ago
I am using autorouter, ill give the rules a read over.
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Jperky 7 years ago
I've gone over the rules, and it still won't route the lines with auto router. for simplicity, I've removed all my components and left just the screw terminals that I want routed. It will route everything but a specific amount of them every time and I'm not sure as to why. ![enter image description here][1] [1]: /editor/20170604/593383e120ba5.JPG
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dillon 7 years ago
The IC3 is complex, you can set the track smaller space smaller, hiden GND net, or use 4 layers. Or use human to layout.
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Jperky 7 years ago
I've discovered what I think it is, and I have no idea why this matters. The J2-ADC(A8-15) in my previous post for some reason when it is named this it won't route all the ratlines. When I rename it to just J2-ADC-0-7 it will route them just fine. Pictures as evidence. I should also note that I changed it on the schematic, then remade the PCB. I didn't just change it on the PCB and leave the schematic how it was. ![Fully Routed][1] [1]: /editor/20170604/5933917abfff4.JPG
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andyfierman 7 years ago
Jperky, In the light of your issue, I have just updated this post on Net and Part naming conventions: https://easyeda.com/forum/topic/Net_and_Part_naming_conventions-uOHBvN5nh which may help you to understand the problem you have experienced.
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Jperky 7 years ago
Ahhh so that might have been my problem. I was using "(A8-15)" and the parenthesis might have fumbled it up when it transferred over from a schematic to PCB?
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andyfierman 7 years ago
I think that is what was upsetting things. I wrote the original version of the post in `Tips and Skill` just about Net naming conventions. It wasn't until you posted about this problem that it occurred to me that because - unless and until they are overwritten by any manually applied label - EasyEDA automatically assigns netnames to all nets based on the names of the components from which they originate (i.e. the net name is based on the name and pin number of the symbol that the start point of a net is attached to when it is first drawn), if there was a character in a *symbol* name that was illegal in a *net* name then any net originating from that symbol would inherit an illegal net name. :)
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