Hello all,
For some reason, when using only top layer + SMT components + T/H vias, the bottom layer is generated without solder mask:
![1.png](//image.easyeda.com/pullimage/wxUu6TVydLGP7x7YGK9OV6dZhXLldzD6qcEh9usB.png)
When adding a T/H pad (upper right corner, next to R2 silk ) is issue is fixed:
![2.png](//image.easyeda.com/pullimage/hD9mdH6M6fVmcbTyo5bMeb2Sj1LCs0K7DMnS02Oh.png)
Is it a bug? is there any other solution for it other than adding the T/H pad?
Thanks!
Nir