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Bottom layer is without solder mask
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niralon 1 year ago
Hello all, For some reason, when using only top layer + SMT components + T/H vias, the bottom layer is generated without solder mask: ![1.png](//image.easyeda.com/pullimage/wxUu6TVydLGP7x7YGK9OV6dZhXLldzD6qcEh9usB.png) When adding a T/H pad (upper right corner, next to R2 silk ) is issue is fixed: ![2.png](//image.easyeda.com/pullimage/hD9mdH6M6fVmcbTyo5bMeb2Sj1LCs0K7DMnS02Oh.png) Is it a bug? is there any other solution for it other than adding the T/H pad? Thanks! Nir
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andyfierman 1 year ago
Your project is private so only you can see it. It is not clear if you have a copper area on the bottom layer. If you have no ground copper area on the bottom layer, why are you placing vias that would normally be covered in solder mask, along the edges? Try adding a ground copper area on the bottom layer instead of the throughhole pad.
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niralon 1 year ago
Hi Andy, The above circuit is only to demonstrate the problem There is a GND plane just underneath the TOP GND red layer, it was not visible when I captured the pic. Thanks Nir
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andyfierman 1 year ago
@niralon, "There is a GND plane just underneath the TOP GND red layer..." Is that on the bottom layer or on an inner layer?
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andyfierman 1 year ago
@niralon, "The above circuit is only to demonstrate the problem" So to properly demonstrate it, please  make it public and post the link to it.
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niralon 1 year ago
Andy, You sound a bit arrogant, sorry I don't speak your "professional language", there is a nicer why to express yourself. Anyway, If other members wish to help I would be happy to explain This is a two layer board GND plane at the TOP and BOT layer. Nir
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cjohnson 1 year ago
@niralon @andyfierman This has been a bug for a super long time. Solder mask gerber files are known as "exposure" files. Meaning, locations pointed out in the file will take away the solder mask. When EasyEDA generates the files, it sees that there are no "exposures" on the bottom layer, so it just doesn't generate a file correctly that shows "no exposure." It instead generates a file that the online viewer sees as no soldermask at all. I personally have created a post about this as well. [https://easyeda.com/forum/topic/Gerber-Generator-not-creating-bottom-solder-mask-properly-a0b2833339464b73851aa60237c8e157](https://easyeda.com/forum/topic/Gerber-Generator-not-creating-bottom-solder-mask-properly-a0b2833339464b73851aa60237c8e157)
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andyfierman 1 year ago
@cjohnson, @niralon, "When EasyEDA generates the files, it sees that there are no "exposures" on the bottom layer, so it just doesn't generate a file correctly that shows "no exposure." I have experimented with placing a multilayer pad with a negative soldermask expansion (to ensure that the pad is completely covered with soldermask) and can confirm that the statement above is correct. What I have found is that if the negative soldermask is large enough to cover the whole of the pad area but is less that the radius of the pad (so that the hypothetical soldermask covering the hole through the pad itself has a small area where the soldermask is not removed) then if that pad is used in place of a via then the missing soldermask is correctly created. The problem then is that, because the pad is not actually a via, if spokes are enabled in the copper area then this pad will generate sp[oke whereas a true via does not. You can try this using the footprint: MULTILAYER\_PAD\_AS\_VIA ![image.png](//image.easyeda.com/pullimage/PbDO2kWiqyyMUTfPHEauF5Y8g4931aMLQG5e1i0J.png)
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niralon 1 year ago
@cjohnson, Sorry for the late response I'm reading your post now and yes, this is exactly the same case. Do you know if this bug will be fixed? Thanks Nir
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andyfierman 1 year ago
@cjohnson, @niralon, I have added my notes above to the original bug report: [https://easyeda.com/forum/topic/Gerber-Generator-not-creating-bottom-solder-mask-properly-a0b2833339464b73851aa60237c8e157](https://easyeda.com/forum/topic/Gerber-Generator-not-creating-bottom-solder-mask-properly-a0b2833339464b73851aa60237c8e157) in the hope that it will be revisited by @UserSupport.
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andyfierman 1 year ago
@cjohnson, @niralon, Here's a workaround. As @cjohnson has described in his bug report - placing an aperture in the soldermask layer that is not being properly created seems to force it to be generated correctly. Assuming that the PCB has at least one hole in it, whether it is for a via, pad, an unplated hole for something like a screw, connector or pot, then if a soldermask aperture with a diameter of less than the diameter of any one of the existing holes is placed in the centre of the selected hole: the missing soldermask layer appears to be correctly generated. This allows the problem to be worked around without the additional aperture in the soldermask layer exposing the copper or substrate material.
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