There are lots of uses try to probe a GND, and place two diffirent probe at the same net. so when simulation, this will be a problem. How can we do in this case?

Supplying power to devices with hidden power pins can be tricky anyway. It is OK if all the devices have a positive supply pin and a ground pin and they are all used on say +5V and ground but what if some are to be used with their positive supply pins connected to ground and their ground pins connected to a negative supply? Maybe it is easier for users to understand how to use the new logic family devices if they do have to set up a power supply like in <http://sandbox.easyeda.com/editor#id=h3s2ecaw5> I think that the way it is shown in <https://easyeda.com/editor#id=80AyvtrNn> is harder to understand for newbies. You are right about newbies trying to probe ground: there does need to be some kind of warning. Let me try some test schematics and think about it a little more.

Have try Eagle, Eagle desn't allow two diffirent netlabels in the same net, but LTSPICE allows.

If there are 2 netlabels on a net LTspice appears to label the net according to which label was placed last. However if you use any of the placed netnames in a B source, then the B source will use it OK. So, if youhave a net label `boo` and another `jubbins` on a net and you have a B source of V=V(boo) then it will be OK. It will still work OK if you change the B source to V=V(jubbins), no matter if you place the `boo` or the `jubbins` label last.